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This patch adds clocking support for the YUV420 output from the Amlogic Meson SoCs Video Processing Unit to the HDMI Controller. The YUV420 is obtained by generating a YUV444 pixel stream like the classic HDMI display modes, but then the Video Encoder output can be configured to down-sample the YUV444 pixel stream to a YUV420 stream. This mode needs a different clock generation scheme since the TMDS PHY clock must match the 10x ratio with the YUV420 pixel clock, but the video encoder must run at 2x the pixel clock. This patch adds the TMDS PHY clock value in all the video clock setup in order to better support these specific uses cases and switch to the Common Clock framework for clocks handling in the future. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jernej Škrabec <jernej.skrabec@siol.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200304104052.17196-11-narmstrong@baylibre.com |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| meson_crtc.c | ||
| meson_crtc.h | ||
| meson_drv.c | ||
| meson_drv.h | ||
| meson_dw_hdmi.c | ||
| meson_dw_hdmi.h | ||
| meson_osd_afbcd.c | ||
| meson_osd_afbcd.h | ||
| meson_overlay.c | ||
| meson_overlay.h | ||
| meson_plane.c | ||
| meson_plane.h | ||
| meson_rdma.c | ||
| meson_rdma.h | ||
| meson_registers.h | ||
| meson_vclk.c | ||
| meson_vclk.h | ||
| meson_venc_cvbs.c | ||
| meson_venc_cvbs.h | ||
| meson_venc.c | ||
| meson_venc.h | ||
| meson_viu.c | ||
| meson_viu.h | ||
| meson_vpp.c | ||
| meson_vpp.h | ||