linux_dsm_epyc7002/drivers/clk/tegra
Peter De Schrijver e589376dab clk: tegra: Fix type for m field
When used as part of fractional ndiv calculations, the current range is
not enough because the denominator of the fraction is multiplied with m.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20 14:06:09 +01:00
..
clk-audio-sync.c
clk-bpmp.c clk: tegra: Add BPMP clock driver 2017-02-03 12:36:36 -08:00
clk-dfll.c PM / OPP: Update OPP users to put reference 2017-01-30 09:22:21 +01:00
clk-dfll.h
clk-divider.c
clk-emc.c
clk-id.h clk: tegra: Fix ISP clock modelling 2017-03-20 14:04:45 +01:00
clk-periph-fixed.c
clk-periph-gate.c
clk-periph.c
clk-pll-out.c
clk-pll.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-super.c
clk-tegra20.c
clk-tegra30.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-tegra114.c clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2 2016-08-24 10:54:17 -07:00
clk-tegra124-dfll-fcpu.c clk: tegra: dfll: Use builtin_platform_driver to simplify the code 2016-11-10 14:08:46 -08:00
clk-tegra124.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-tegra210.c clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation 2017-03-20 14:05:46 +01:00
clk-tegra-audio.c
clk-tegra-fixed.c
clk-tegra-periph.c clk: tegra: Correct afi clock parent 2017-03-20 14:05:03 +01:00
clk-tegra-pmc.c
clk-tegra-super-gen4.c
clk.c
clk.h clk: tegra: Fix type for m field 2017-03-20 14:06:09 +01:00
cvb.c clk: tegra: dfll: improve function-level documentation 2016-11-01 17:38:50 -07:00
cvb.h
Kconfig clk: tegra: Add BPMP clock driver 2017-02-03 12:36:36 -08:00
Makefile clk: tegra: Add BPMP clock driver 2017-02-03 12:36:36 -08:00