mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 17:05:18 +07:00
ea010e5188
Add missing CLK_SET_RATE_PARENT flag for gate clock. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> |
||
---|---|---|
.. | ||
clk-hi3620.c | ||
clk.c | ||
clk.h | ||
clkgate-separated.c | ||
Makefile |