mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 03:58:46 +07:00
bd0b9ac405
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
229 lines
5.3 KiB
C
229 lines
5.3 KiB
C
/*
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* Operating System Services (OSS) chip handling
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* Written by Joshua M. Thompson (funaho@jurai.org)
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*
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*
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* This chip is used in the IIfx in place of VIA #2. It acts like a fancy
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* VIA chip with prorammable interrupt levels.
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*
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* 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
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* recent insights into OSS operational details.
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* 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped
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* to mostly match the A/UX interrupt scheme supported on the
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* VIA side. Also added support for enabling the ISM irq again
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* since we now have a functional IOP manager.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/macintosh.h>
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#include <asm/macints.h>
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#include <asm/mac_via.h>
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#include <asm/mac_oss.h>
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int oss_present;
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volatile struct mac_oss *oss;
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/*
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* Initialize the OSS
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*
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* The OSS "detection" code is actually in via_init() which is always called
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* before us. Thus we can count on oss_present being valid on entry.
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*/
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void __init oss_init(void)
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{
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int i;
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if (!oss_present) return;
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oss = (struct mac_oss *) OSS_BASE;
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/* Disable all interrupts. Unlike a VIA it looks like we */
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/* do this by setting the source's interrupt level to zero. */
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for (i = 0; i < OSS_NUM_SOURCES; i++)
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oss->irq_level[i] = 0;
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}
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/*
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* Initialize OSS for Nubus access
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*/
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void __init oss_nubus_init(void)
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{
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}
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/*
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* Handle miscellaneous OSS interrupts.
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*/
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static void oss_irq(struct irq_desc *desc)
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{
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int events = oss->irq_pending &
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(OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM);
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#ifdef DEBUG_IRQS
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if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
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unsigned int irq = irq_desc_get_irq(desc);
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printk("oss_irq: irq %u events = 0x%04X\n", irq,
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(int) oss->irq_pending);
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}
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#endif
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if (events & OSS_IP_IOPSCC) {
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oss->irq_pending &= ~OSS_IP_IOPSCC;
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generic_handle_irq(IRQ_MAC_SCC);
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}
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if (events & OSS_IP_SCSI) {
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oss->irq_pending &= ~OSS_IP_SCSI;
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generic_handle_irq(IRQ_MAC_SCSI);
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}
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if (events & OSS_IP_IOPISM) {
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oss->irq_pending &= ~OSS_IP_IOPISM;
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generic_handle_irq(IRQ_MAC_ADB);
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}
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}
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/*
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* Nubus IRQ handler, OSS style
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*
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* Unlike the VIA/RBV this is on its own autovector interrupt level.
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*/
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static void oss_nubus_irq(struct irq_desc *desc)
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{
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int events, irq_bit, i;
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events = oss->irq_pending & OSS_IP_NUBUS;
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if (!events)
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return;
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#ifdef DEBUG_NUBUS_INT
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if (console_loglevel > 7) {
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printk("oss_nubus_irq: events = 0x%04X\n", events);
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}
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#endif
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/* There are only six slots on the OSS, not seven */
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i = 6;
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irq_bit = 0x40;
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do {
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--i;
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irq_bit >>= 1;
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if (events & irq_bit) {
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oss->irq_pending &= ~irq_bit;
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generic_handle_irq(NUBUS_SOURCE_BASE + i);
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}
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} while(events & (irq_bit - 1));
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}
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/*
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* Register the OSS and NuBus interrupt dispatchers.
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*
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* This IRQ mapping is laid out with two things in mind: first, we try to keep
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* things on their own levels to avoid having to do double-dispatches. Second,
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* the levels match as closely as possible the alternate IRQ mapping mode (aka
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* "A/UX mode") available on some VIA machines.
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*/
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#define OSS_IRQLEV_IOPISM IRQ_AUTO_1
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#define OSS_IRQLEV_SCSI IRQ_AUTO_2
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#define OSS_IRQLEV_NUBUS IRQ_AUTO_3
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#define OSS_IRQLEV_IOPSCC IRQ_AUTO_4
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#define OSS_IRQLEV_VIA1 IRQ_AUTO_6
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void __init oss_register_interrupts(void)
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{
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irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq);
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irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq);
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irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
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irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq);
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irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
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/* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
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oss->irq_level[OSS_VIA1] = IRQ_AUTO_6;
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}
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/*
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* Enable an OSS interrupt
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*
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* It looks messy but it's rather straightforward. The switch() statement
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* just maps the machspec interrupt numbers to the right OSS interrupt
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* source (if the OSS handles that interrupt) and then sets the interrupt
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* level for that source to nonzero, thus enabling the interrupt.
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*/
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void oss_irq_enable(int irq) {
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#ifdef DEBUG_IRQUSE
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printk("oss_irq_enable(%d)\n", irq);
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#endif
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switch(irq) {
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case IRQ_MAC_SCC:
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oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
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return;
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case IRQ_MAC_ADB:
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oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
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return;
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case IRQ_MAC_SCSI:
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oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
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return;
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case IRQ_NUBUS_9:
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case IRQ_NUBUS_A:
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case IRQ_NUBUS_B:
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case IRQ_NUBUS_C:
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case IRQ_NUBUS_D:
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case IRQ_NUBUS_E:
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irq -= NUBUS_SOURCE_BASE;
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oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
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return;
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}
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if (IRQ_SRC(irq) == 1)
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via_irq_enable(irq);
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}
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/*
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* Disable an OSS interrupt
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*
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* Same as above except we set the source's interrupt level to zero,
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* to disable the interrupt.
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*/
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void oss_irq_disable(int irq) {
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#ifdef DEBUG_IRQUSE
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printk("oss_irq_disable(%d)\n", irq);
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#endif
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switch(irq) {
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case IRQ_MAC_SCC:
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oss->irq_level[OSS_IOPSCC] = 0;
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return;
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case IRQ_MAC_ADB:
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oss->irq_level[OSS_IOPISM] = 0;
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return;
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case IRQ_MAC_SCSI:
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oss->irq_level[OSS_SCSI] = 0;
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return;
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case IRQ_NUBUS_9:
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case IRQ_NUBUS_A:
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case IRQ_NUBUS_B:
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case IRQ_NUBUS_C:
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case IRQ_NUBUS_D:
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case IRQ_NUBUS_E:
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irq -= NUBUS_SOURCE_BASE;
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oss->irq_level[irq] = 0;
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return;
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}
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if (IRQ_SRC(irq) == 1)
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via_irq_disable(irq);
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}
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