mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
808ecf4ad0
This patch adds the binding documentation for apmixedsys, ethsys, hifsys, infracfg, pericfg, topckgen and audsys for MT7622. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
26 lines
649 B
Plaintext
26 lines
649 B
Plaintext
Mediatek hifsys controller
|
|
============================
|
|
|
|
The Mediatek hifsys controller provides various clocks and reset
|
|
outputs to the system.
|
|
|
|
Required Properties:
|
|
|
|
- compatible: Should be:
|
|
- "mediatek,mt2701-hifsys", "syscon"
|
|
- "mediatek,mt7622-hifsys", "syscon"
|
|
- #clock-cells: Must be 1
|
|
|
|
The hifsys controller uses the common clk binding from
|
|
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
|
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
|
|
|
|
Example:
|
|
|
|
hifsys: clock-controller@1a000000 {
|
|
compatible = "mediatek,mt2701-hifsys", "syscon";
|
|
reg = <0 0x1a000000 0 0x1000>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
};
|