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e4e517b4be
Architecturally, PDPTEs are cached in the PDPTRs when CR3 is reloaded. On SVM, it is not possible to implement this, but on VMX this is possible and was indeed implemented until nested SVM changed this to unconditionally read PDPTEs dynamically. This has noticable impact when running PAE guests. Fix by changing the MMU to read PDPTRs from the cache, falling back to reading from memory for the nested MMU. Signed-off-by: Avi Kivity <avi@redhat.com> Tested-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> |
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.. | ||
emulate.c | ||
i8254.c | ||
i8254.h | ||
i8259.c | ||
irq.c | ||
irq.h | ||
Kconfig | ||
kvm_cache_regs.h | ||
kvm_timer.h | ||
lapic.c | ||
lapic.h | ||
Makefile | ||
mmu_audit.c | ||
mmu.c | ||
mmu.h | ||
mmutrace.h | ||
paging_tmpl.h | ||
svm.c | ||
timer.c | ||
trace.h | ||
tss.h | ||
vmx.c | ||
x86.c | ||
x86.h |