mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 10:46:40 +07:00
50d0e24499
move pxa168 clock definition to another file. Then pxa168 can choose common clock framework or private clock framework. Signed-off-by: Chao Xie <xiechao.mail@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
92 lines
2.9 KiB
C
92 lines
2.9 KiB
C
#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <mach/addr-map.h>
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#include "common.h"
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#include "clock.h"
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/*
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* APB clock register offsets for PXA168
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*/
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#define APBC_UART1 APBC_REG(0x000)
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#define APBC_UART2 APBC_REG(0x004)
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#define APBC_GPIO APBC_REG(0x008)
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#define APBC_PWM1 APBC_REG(0x00c)
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#define APBC_PWM2 APBC_REG(0x010)
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#define APBC_PWM3 APBC_REG(0x014)
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#define APBC_PWM4 APBC_REG(0x018)
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#define APBC_RTC APBC_REG(0x028)
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#define APBC_TWSI0 APBC_REG(0x02c)
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#define APBC_KPC APBC_REG(0x030)
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#define APBC_TWSI1 APBC_REG(0x06c)
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#define APBC_UART3 APBC_REG(0x070)
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#define APBC_SSP1 APBC_REG(0x81c)
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#define APBC_SSP2 APBC_REG(0x820)
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#define APBC_SSP3 APBC_REG(0x84c)
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#define APBC_SSP4 APBC_REG(0x858)
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#define APBC_SSP5 APBC_REG(0x85c)
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#define APMU_NAND APMU_REG(0x060)
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#define APMU_LCD APMU_REG(0x04c)
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#define APMU_ETH APMU_REG(0x0fc)
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#define APMU_USB APMU_REG(0x05c)
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/* APB peripheral clocks */
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static APBC_CLK(uart1, UART1, 1, 14745600);
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static APBC_CLK(uart2, UART2, 1, 14745600);
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static APBC_CLK(uart3, UART3, 1, 14745600);
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static APBC_CLK(twsi0, TWSI0, 1, 33000000);
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static APBC_CLK(twsi1, TWSI1, 1, 33000000);
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static APBC_CLK(pwm1, PWM1, 1, 13000000);
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static APBC_CLK(pwm2, PWM2, 1, 13000000);
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static APBC_CLK(pwm3, PWM3, 1, 13000000);
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static APBC_CLK(pwm4, PWM4, 1, 13000000);
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static APBC_CLK(ssp1, SSP1, 4, 0);
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static APBC_CLK(ssp2, SSP2, 4, 0);
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static APBC_CLK(ssp3, SSP3, 4, 0);
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static APBC_CLK(ssp4, SSP4, 4, 0);
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static APBC_CLK(ssp5, SSP5, 4, 0);
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static APBC_CLK(gpio, GPIO, 0, 13000000);
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static APBC_CLK(keypad, KPC, 0, 32000);
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static APBC_CLK(rtc, RTC, 8, 32768);
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static APMU_CLK(nand, NAND, 0x19b, 156000000);
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static APMU_CLK(lcd, LCD, 0x7f, 312000000);
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static APMU_CLK(eth, ETH, 0x09, 0);
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static APMU_CLK(usb, USB, 0x12, 0);
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/* device and clock bindings */
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static struct clk_lookup pxa168_clkregs[] = {
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INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
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INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
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INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
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INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
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INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
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INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
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INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
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INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
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INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
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INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
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INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
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INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
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INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
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INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
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INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
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INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
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INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
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INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
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INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
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INIT_CLKREG(&clk_usb, NULL, "PXA168-USBCLK"),
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INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
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};
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void __init pxa168_clk_init(void)
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{
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clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
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}
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