mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
755a9ba7bf
As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTjNNQAAoJEIwa5zzehBx3KyYP/3TEJcXXEYDURXDB0SktPNyy cKp5HUnsu4+aq/Ae6jdjVGiX5FZa64Xije9b0kP3oxoPS+fuODvzhlnoEsT84Ab5 /jeygWJZYUIWAQTxShPT55K8WAEtL7H1WcvswdCZoTDxPBNCLR/nLzv084nv9Die IOUWDTKW4qB8+KYQxh2TBx0E1TorZ0J5OWf6qqepZ0i4J5dhL1VYtc/ZNU5C37V5 rZyyBQNOCBE/MK/Dw9CnResQf4f8DigHBYgpl7VxB+bBqfgzFuSSEPvg21MXLkfi ln64yYTVvqhleVjGriDV+mUHOCZr4sUWZPDzeF5HzpvqDAMDWTsWlHNh6WDU6dgo b+zFPqqnWaBiWrinY+o7MVvjVzu3Nf8id/GyjnDJEFbSc9ka/8uiC3v9UJXAFawF 3Huc3K6BC/3qOoCPfnBotzx7Xxxvjk2lPRfnonhSvBoSzPeFc6vz2k4USX1GbdkB y/v+Q+n52VebxiKknTMv9HOI06yTOJo2ji+2iKIULb+W86HzNRZL8ZlmNib4WysF z/OgHZl+YzbhJQJtvfBecCIH2Hu+A4GD2ES8hhklA0QhFHPiDfB9cqcsthSGS5oL dDaGv6XGpHoySlEm1ybgWhvH96dc7lTR+nPGZqCKtRBn5pJiEHczxQ2Jz3aBHYeW PUPlrVfYXzIKsh+OU1HO =OvOG -----END PGP SIGNATURE----- Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
/*
|
|
* Copyright 2013 Ideas On Board SPRL
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*/
|
|
|
|
#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
|
|
#define __DT_BINDINGS_CLOCK_R8A7790_H__
|
|
|
|
/* CPG */
|
|
#define R8A7790_CLK_MAIN 0
|
|
#define R8A7790_CLK_PLL0 1
|
|
#define R8A7790_CLK_PLL1 2
|
|
#define R8A7790_CLK_PLL3 3
|
|
#define R8A7790_CLK_LB 4
|
|
#define R8A7790_CLK_QSPI 5
|
|
#define R8A7790_CLK_SDH 6
|
|
#define R8A7790_CLK_SD0 7
|
|
#define R8A7790_CLK_SD1 8
|
|
#define R8A7790_CLK_Z 9
|
|
|
|
/* MSTP0 */
|
|
#define R8A7790_CLK_MSIOF0 0
|
|
|
|
/* MSTP1 */
|
|
#define R8A7790_CLK_TMU1 11
|
|
#define R8A7790_CLK_TMU3 21
|
|
#define R8A7790_CLK_TMU2 22
|
|
#define R8A7790_CLK_CMT0 24
|
|
#define R8A7790_CLK_TMU0 25
|
|
#define R8A7790_CLK_VSP1_DU1 27
|
|
#define R8A7790_CLK_VSP1_DU0 28
|
|
#define R8A7790_CLK_VSP1_R 30
|
|
#define R8A7790_CLK_VSP1_S 31
|
|
|
|
/* MSTP2 */
|
|
#define R8A7790_CLK_SCIFA2 2
|
|
#define R8A7790_CLK_SCIFA1 3
|
|
#define R8A7790_CLK_SCIFA0 4
|
|
#define R8A7790_CLK_MSIOF2 5
|
|
#define R8A7790_CLK_SCIFB0 6
|
|
#define R8A7790_CLK_SCIFB1 7
|
|
#define R8A7790_CLK_MSIOF1 8
|
|
#define R8A7790_CLK_MSIOF3 15
|
|
#define R8A7790_CLK_SCIFB2 16
|
|
#define R8A7790_CLK_SYS_DMAC1 18
|
|
#define R8A7790_CLK_SYS_DMAC0 19
|
|
|
|
/* MSTP3 */
|
|
#define R8A7790_CLK_IIC2 0
|
|
#define R8A7790_CLK_TPU0 4
|
|
#define R8A7790_CLK_MMCIF1 5
|
|
#define R8A7790_CLK_SDHI3 11
|
|
#define R8A7790_CLK_SDHI2 12
|
|
#define R8A7790_CLK_SDHI1 13
|
|
#define R8A7790_CLK_SDHI0 14
|
|
#define R8A7790_CLK_MMCIF0 15
|
|
#define R8A7790_CLK_IIC0 18
|
|
#define R8A7790_CLK_IIC1 23
|
|
#define R8A7790_CLK_SSUSB 28
|
|
#define R8A7790_CLK_CMT1 29
|
|
#define R8A7790_CLK_USBDMAC0 30
|
|
#define R8A7790_CLK_USBDMAC1 31
|
|
|
|
/* MSTP5 */
|
|
#define R8A7790_CLK_THERMAL 22
|
|
#define R8A7790_CLK_PWM 23
|
|
|
|
/* MSTP7 */
|
|
#define R8A7790_CLK_EHCI 3
|
|
#define R8A7790_CLK_HSUSB 4
|
|
#define R8A7790_CLK_HSCIF1 16
|
|
#define R8A7790_CLK_HSCIF0 17
|
|
#define R8A7790_CLK_SCIF1 20
|
|
#define R8A7790_CLK_SCIF0 21
|
|
#define R8A7790_CLK_DU2 22
|
|
#define R8A7790_CLK_DU1 23
|
|
#define R8A7790_CLK_DU0 24
|
|
#define R8A7790_CLK_LVDS1 25
|
|
#define R8A7790_CLK_LVDS0 26
|
|
|
|
/* MSTP8 */
|
|
#define R8A7790_CLK_VIN3 8
|
|
#define R8A7790_CLK_VIN2 9
|
|
#define R8A7790_CLK_VIN1 10
|
|
#define R8A7790_CLK_VIN0 11
|
|
#define R8A7790_CLK_ETHER 13
|
|
#define R8A7790_CLK_SATA1 14
|
|
#define R8A7790_CLK_SATA0 15
|
|
|
|
/* MSTP9 */
|
|
#define R8A7790_CLK_GPIO5 7
|
|
#define R8A7790_CLK_GPIO4 8
|
|
#define R8A7790_CLK_GPIO3 9
|
|
#define R8A7790_CLK_GPIO2 10
|
|
#define R8A7790_CLK_GPIO1 11
|
|
#define R8A7790_CLK_GPIO0 12
|
|
#define R8A7790_CLK_RCAN1 15
|
|
#define R8A7790_CLK_RCAN0 16
|
|
#define R8A7790_CLK_QSPI_MOD 17
|
|
#define R8A7790_CLK_IICDVFS 26
|
|
#define R8A7790_CLK_I2C3 28
|
|
#define R8A7790_CLK_I2C2 29
|
|
#define R8A7790_CLK_I2C1 30
|
|
#define R8A7790_CLK_I2C0 31
|
|
|
|
#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
|