mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 15:16:41 +07:00
3fb39c482c
Removed some statistic counters to improve the performance of the handler. Signed-off-by: Bernd Weiberg <bernd.weiberg@siemens.com> Signed-off-by: Ley Foon Tan <lftan@altera.com>
239 lines
5.3 KiB
C
239 lines
5.3 KiB
C
/*
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* linux/arch/nios2/kernel/misaligned.c
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*
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* basic emulation for mis-aligned accesses on the NIOS II cpu
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* modelled after the version for arm in arm/alignment.c
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*
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* Brad Parker <brad@heeltoe.com>
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* Copyright (C) 2010 Ambient Corporation
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* Copyright (c) 2010 Altera Corporation, San Jose, California, USA.
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* Copyright (c) 2010 Arrow Electronics, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of
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* this archive for more details.
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*/
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/proc_fs.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/uaccess.h>
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#include <linux/seq_file.h>
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#include <asm/traps.h>
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#include <asm/unaligned.h>
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/* instructions we emulate */
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#define INST_LDHU 0x0b
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#define INST_STH 0x0d
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#define INST_LDH 0x0f
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#define INST_STW 0x15
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#define INST_LDW 0x17
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static unsigned int ma_usermode;
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#define UM_WARN 0x01
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#define UM_FIXUP 0x02
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#define UM_SIGNAL 0x04
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#define KM_WARN 0x08
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/* see arch/nios2/include/asm/ptrace.h */
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static u8 sys_stack_frame_reg_offset[] = {
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/* struct pt_regs */
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8, 9, 10, 11, 12, 13, 14, 15, 1, 2, 3, 4, 5, 6, 7, 0,
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/* struct switch_stack */
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16, 17, 18, 19, 20, 21, 22, 23, 0, 0, 0, 0, 0, 0, 0, 0
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};
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static int reg_offsets[32];
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static inline u32 get_reg_val(struct pt_regs *fp, int reg)
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{
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u8 *p = ((u8 *)fp) + reg_offsets[reg];
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return *(u32 *)p;
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}
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static inline void put_reg_val(struct pt_regs *fp, int reg, u32 val)
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{
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u8 *p = ((u8 *)fp) + reg_offsets[reg];
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*(u32 *)p = val;
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}
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/*
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* (mis)alignment handler
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*/
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asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
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{
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u32 isn, addr, val;
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int in_kernel;
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u8 a, b, d0, d1, d2, d3;
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s16 imm16;
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unsigned int fault;
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/* back up one instruction */
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fp->ea -= 4;
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if (fixup_exception(fp)) {
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return;
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}
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in_kernel = !user_mode(fp);
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isn = *(unsigned long *)(fp->ea);
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fault = 0;
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/* do fixup if in kernel or mode turned on */
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if (in_kernel || (ma_usermode & UM_FIXUP)) {
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/* decompose instruction */
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a = (isn >> 27) & 0x1f;
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b = (isn >> 22) & 0x1f;
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imm16 = (isn >> 6) & 0xffff;
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addr = get_reg_val(fp, a) + imm16;
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/* do fixup to saved registers */
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switch (isn & 0x3f) {
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case INST_LDHU:
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fault |= __get_user(d0, (u8 *)(addr+0));
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fault |= __get_user(d1, (u8 *)(addr+1));
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val = (d1 << 8) | d0;
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put_reg_val(fp, b, val);
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break;
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case INST_STH:
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val = get_reg_val(fp, b);
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d1 = val >> 8;
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d0 = val >> 0;
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if (in_kernel) {
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*(u8 *)(addr+0) = d0;
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*(u8 *)(addr+1) = d1;
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} else {
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fault |= __put_user(d0, (u8 *)(addr+0));
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fault |= __put_user(d1, (u8 *)(addr+1));
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}
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break;
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case INST_LDH:
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fault |= __get_user(d0, (u8 *)(addr+0));
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fault |= __get_user(d1, (u8 *)(addr+1));
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val = (short)((d1 << 8) | d0);
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put_reg_val(fp, b, val);
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break;
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case INST_STW:
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val = get_reg_val(fp, b);
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d3 = val >> 24;
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d2 = val >> 16;
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d1 = val >> 8;
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d0 = val >> 0;
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if (in_kernel) {
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*(u8 *)(addr+0) = d0;
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*(u8 *)(addr+1) = d1;
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*(u8 *)(addr+2) = d2;
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*(u8 *)(addr+3) = d3;
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} else {
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fault |= __put_user(d0, (u8 *)(addr+0));
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fault |= __put_user(d1, (u8 *)(addr+1));
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fault |= __put_user(d2, (u8 *)(addr+2));
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fault |= __put_user(d3, (u8 *)(addr+3));
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}
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break;
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case INST_LDW:
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fault |= __get_user(d0, (u8 *)(addr+0));
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fault |= __get_user(d1, (u8 *)(addr+1));
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fault |= __get_user(d2, (u8 *)(addr+2));
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fault |= __get_user(d3, (u8 *)(addr+3));
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val = (d3 << 24) | (d2 << 16) | (d1 << 8) | d0;
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put_reg_val(fp, b, val);
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break;
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}
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}
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addr = RDCTL(CTL_BADADDR);
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cause >>= 2;
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if (fault) {
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if (in_kernel) {
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pr_err("fault during kernel misaligned fixup @ %#lx; addr 0x%08x; isn=0x%08x\n",
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fp->ea, (unsigned int)addr,
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(unsigned int)isn);
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} else {
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pr_err("fault during user misaligned fixup @ %#lx; isn=%08x addr=0x%08x sp=0x%08lx pid=%d\n",
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fp->ea,
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(unsigned int)isn, addr, fp->sp,
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current->pid);
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_exception(SIGSEGV, fp, SEGV_MAPERR, fp->ea);
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return;
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}
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}
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/*
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* kernel mode -
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* note exception and skip bad instruction (return)
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*/
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if (in_kernel) {
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fp->ea += 4;
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if (ma_usermode & KM_WARN) {
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pr_err("kernel unaligned access @ %#lx; BADADDR 0x%08x; cause=%d, isn=0x%08x\n",
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fp->ea,
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(unsigned int)addr, cause,
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(unsigned int)isn);
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/* show_regs(fp); */
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}
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return;
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}
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/*
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* user mode -
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* possibly warn,
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* possibly send SIGBUS signal to process
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*/
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if (ma_usermode & UM_WARN) {
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pr_err("user unaligned access @ %#lx; isn=0x%08lx ea=0x%08lx ra=0x%08lx sp=0x%08lx\n",
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(unsigned long)addr, (unsigned long)isn,
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fp->ea, fp->ra, fp->sp);
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}
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if (ma_usermode & UM_SIGNAL)
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_exception(SIGBUS, fp, BUS_ADRALN, fp->ea);
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else
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fp->ea += 4; /* else advance */
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}
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static void __init misaligned_calc_reg_offsets(void)
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{
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int i, r, offset;
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/* pre-calc offsets of registers on sys call stack frame */
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offset = 0;
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/* struct pt_regs */
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for (i = 0; i < 16; i++) {
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r = sys_stack_frame_reg_offset[i];
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reg_offsets[r] = offset;
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offset += 4;
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}
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/* struct switch_stack */
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offset = -sizeof(struct switch_stack);
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for (i = 16; i < 32; i++) {
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r = sys_stack_frame_reg_offset[i];
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reg_offsets[r] = offset;
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offset += 4;
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}
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}
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static int __init misaligned_init(void)
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{
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/* default mode - silent fix */
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ma_usermode = UM_FIXUP | KM_WARN;
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misaligned_calc_reg_offsets();
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return 0;
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}
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fs_initcall(misaligned_init);
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