mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 00:16:39 +07:00
606d099cdd
This is the grungy swap all the occurrences in the right places patch that goes with the updates. At this point we have the same functionality as before (except that sgttyb() returns speeds not zero) and are ready to begin turning new stuff on providing nobody reports lots of bugs If you are a tty driver author converting an out of tree driver the only impact should be termios->ktermios name changes for the speed/property setting functions from your upper layers. If you are implementing your own TCGETS function before then your driver was broken already and its about to get a whole lot more painful for you so please fix it 8) Also fill in c_ispeed/ospeed on init for most devices, although the current code will do this for you anyway but I'd like eventually to lose that extra paranoia [akpm@osdl.org: bluetooth fix] [mp3@de.ibm.com: sclp fix] [mp3@de.ibm.com: warning fix for tty3270] [hugh@veritas.com: fix tty_ioctl powerpc build] [jdike@addtoit.com: uml: fix ->set_termios declaration] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Martin Peschke <mp3@de.ibm.com> Acked-by: Peter Oberparleiter <oberpar@de.ibm.com> Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Jeff Dike <jdike@addtoit.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
583 lines
13 KiB
C
583 lines
13 KiB
C
/*
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* linux/drivers/char/clps711x.c
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*
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* Driver for CLPS711x serial ports
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* Copyright 1999 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $
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*
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*/
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#if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/spinlock.h>
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#include <linux/device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hardware/clps7111.h>
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#define UART_NR 2
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#define SERIAL_CLPS711X_MAJOR 204
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#define SERIAL_CLPS711X_MINOR 40
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#define SERIAL_CLPS711X_NR UART_NR
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/*
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* We use the relevant SYSCON register as a base address for these ports.
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*/
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#define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1)
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#define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1)
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#define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1)
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#define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1)
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#define TX_IRQ(port) ((port)->irq)
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#define RX_IRQ(port) ((port)->irq + 1)
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#define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
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#define tx_enabled(port) ((port)->unused[0])
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static void clps711xuart_stop_tx(struct uart_port *port)
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{
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if (tx_enabled(port)) {
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disable_irq(TX_IRQ(port));
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tx_enabled(port) = 0;
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}
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}
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static void clps711xuart_start_tx(struct uart_port *port)
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{
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if (!tx_enabled(port)) {
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enable_irq(TX_IRQ(port));
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tx_enabled(port) = 1;
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}
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}
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static void clps711xuart_stop_rx(struct uart_port *port)
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{
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disable_irq(RX_IRQ(port));
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}
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static void clps711xuart_enable_ms(struct uart_port *port)
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{
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}
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static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct tty_struct *tty = port->info->tty;
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unsigned int status, ch, flg;
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status = clps_readl(SYSFLG(port));
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while (!(status & SYSFLG_URXFE)) {
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ch = clps_readl(UARTDR(port));
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port->icount.rx++;
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flg = TTY_NORMAL;
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/*
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* Note that the error handling code is
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* out of the main execution path
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*/
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if (unlikely(ch & UART_ANY_ERR)) {
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if (ch & UARTDR_PARERR)
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port->icount.parity++;
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else if (ch & UARTDR_FRMERR)
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port->icount.frame++;
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if (ch & UARTDR_OVERR)
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port->icount.overrun++;
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ch &= port->read_status_mask;
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if (ch & UARTDR_PARERR)
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flg = TTY_PARITY;
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else if (ch & UARTDR_FRMERR)
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flg = TTY_FRAME;
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#ifdef SUPPORT_SYSRQ
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port->sysrq = 0;
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#endif
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}
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if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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/*
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* CHECK: does overrun affect the current character?
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* ASSUMPTION: it does not.
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*/
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uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
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ignore_char:
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status = clps_readl(SYSFLG(port));
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}
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tty_flip_buffer_push(tty);
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return IRQ_HANDLED;
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}
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static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct circ_buf *xmit = &port->info->xmit;
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int count;
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if (port->x_char) {
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clps_writel(port->x_char, UARTDR(port));
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port->icount.tx++;
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port->x_char = 0;
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return IRQ_HANDLED;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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clps711xuart_stop_tx(port);
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return IRQ_HANDLED;
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}
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count = port->fifosize >> 1;
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do {
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clps_writel(xmit->buf[xmit->tail], UARTDR(port));
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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clps711xuart_stop_tx(port);
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return IRQ_HANDLED;
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}
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static unsigned int clps711xuart_tx_empty(struct uart_port *port)
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{
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unsigned int status = clps_readl(SYSFLG(port));
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return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
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}
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static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
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{
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unsigned int port_addr;
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unsigned int result = 0;
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unsigned int status;
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port_addr = SYSFLG(port);
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if (port_addr == SYSFLG1) {
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status = clps_readl(SYSFLG1);
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if (status & SYSFLG1_DCD)
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result |= TIOCM_CAR;
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if (status & SYSFLG1_DSR)
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result |= TIOCM_DSR;
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if (status & SYSFLG1_CTS)
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result |= TIOCM_CTS;
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}
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return result;
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}
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static void
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clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
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{
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}
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static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned long flags;
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unsigned int ubrlcr;
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spin_lock_irqsave(&port->lock, flags);
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ubrlcr = clps_readl(UBRLCR(port));
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if (break_state == -1)
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ubrlcr |= UBRLCR_BREAK;
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else
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ubrlcr &= ~UBRLCR_BREAK;
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clps_writel(ubrlcr, UBRLCR(port));
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int clps711xuart_startup(struct uart_port *port)
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{
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unsigned int syscon;
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int retval;
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tx_enabled(port) = 1;
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/*
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* Allocate the IRQs
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*/
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retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
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"clps711xuart_tx", port);
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if (retval)
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return retval;
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retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
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"clps711xuart_rx", port);
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if (retval) {
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free_irq(TX_IRQ(port), port);
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return retval;
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}
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/*
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* enable the port
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*/
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syscon = clps_readl(SYSCON(port));
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syscon |= SYSCON_UARTEN;
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clps_writel(syscon, SYSCON(port));
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return 0;
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}
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static void clps711xuart_shutdown(struct uart_port *port)
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{
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unsigned int ubrlcr, syscon;
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/*
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* Free the interrupt
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*/
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free_irq(TX_IRQ(port), port); /* TX interrupt */
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free_irq(RX_IRQ(port), port); /* RX interrupt */
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/*
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* disable the port
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*/
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syscon = clps_readl(SYSCON(port));
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syscon &= ~SYSCON_UARTEN;
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clps_writel(syscon, SYSCON(port));
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/*
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* disable break condition and fifos
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*/
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ubrlcr = clps_readl(UBRLCR(port));
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ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
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clps_writel(ubrlcr, UBRLCR(port));
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}
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static void
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clps711xuart_set_termios(struct uart_port *port, struct ktermios *termios,
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struct ktermios *old)
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{
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unsigned int ubrlcr, baud, quot;
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unsigned long flags;
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/*
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* We don't implement CREAD.
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*/
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termios->c_cflag |= CREAD;
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/*
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* Ask the core to calculate the divisor for us.
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*/
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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quot = uart_get_divisor(port, baud);
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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ubrlcr = UBRLCR_WRDLEN5;
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break;
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case CS6:
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ubrlcr = UBRLCR_WRDLEN6;
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break;
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case CS7:
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ubrlcr = UBRLCR_WRDLEN7;
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break;
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default: // CS8
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ubrlcr = UBRLCR_WRDLEN8;
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break;
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}
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if (termios->c_cflag & CSTOPB)
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ubrlcr |= UBRLCR_XSTOP;
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if (termios->c_cflag & PARENB) {
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ubrlcr |= UBRLCR_PRTEN;
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if (!(termios->c_cflag & PARODD))
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ubrlcr |= UBRLCR_EVENPRT;
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}
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if (port->fifosize > 1)
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ubrlcr |= UBRLCR_FIFOEN;
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spin_lock_irqsave(&port->lock, flags);
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/*
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* Update the per-port timeout.
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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port->read_status_mask = UARTDR_OVERR;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
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/*
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* Characters to ignore
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*/
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
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if (termios->c_iflag & IGNBRK) {
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/*
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* If we're ignoring parity and break indicators,
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* ignore overruns to (for real raw support).
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*/
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UARTDR_OVERR;
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}
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quot -= 1;
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clps_writel(ubrlcr | quot, UBRLCR(port));
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *clps711xuart_type(struct uart_port *port)
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{
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return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
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}
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/*
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* Configure/autoconfigure the port.
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*/
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static void clps711xuart_config_port(struct uart_port *port, int flags)
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{
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if (flags & UART_CONFIG_TYPE)
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port->type = PORT_CLPS711X;
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}
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static void clps711xuart_release_port(struct uart_port *port)
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{
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}
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static int clps711xuart_request_port(struct uart_port *port)
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{
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return 0;
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}
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static struct uart_ops clps711x_pops = {
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.tx_empty = clps711xuart_tx_empty,
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.set_mctrl = clps711xuart_set_mctrl_null,
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.get_mctrl = clps711xuart_get_mctrl,
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.stop_tx = clps711xuart_stop_tx,
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.start_tx = clps711xuart_start_tx,
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.stop_rx = clps711xuart_stop_rx,
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.enable_ms = clps711xuart_enable_ms,
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.break_ctl = clps711xuart_break_ctl,
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.startup = clps711xuart_startup,
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.shutdown = clps711xuart_shutdown,
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.set_termios = clps711xuart_set_termios,
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.type = clps711xuart_type,
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.config_port = clps711xuart_config_port,
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.release_port = clps711xuart_release_port,
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.request_port = clps711xuart_request_port,
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};
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static struct uart_port clps711x_ports[UART_NR] = {
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{
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.iobase = SYSCON1,
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.irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
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.uartclk = 3686400,
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.fifosize = 16,
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.ops = &clps711x_pops,
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.line = 0,
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.flags = UPF_BOOT_AUTOCONF,
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},
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{
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.iobase = SYSCON2,
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.irq = IRQ_UTXINT2, /* IRQ_URXINT2 */
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.uartclk = 3686400,
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.fifosize = 16,
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.ops = &clps711x_pops,
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.line = 1,
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.flags = UPF_BOOT_AUTOCONF,
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}
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};
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#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
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static void clps711xuart_console_putchar(struct uart_port *port, int ch)
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{
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while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
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barrier();
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clps_writel(ch, UARTDR(port));
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}
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/*
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* Print a string to the serial port trying not to disturb
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* any possible real use of the port...
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*
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* The console_lock must be held when we get here.
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*
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* Note that this is called with interrupts already disabled
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*/
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static void
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clps711xuart_console_write(struct console *co, const char *s,
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unsigned int count)
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{
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struct uart_port *port = clps711x_ports + co->index;
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unsigned int status, syscon;
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/*
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* Ensure that the port is enabled.
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*/
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syscon = clps_readl(SYSCON(port));
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clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
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uart_console_write(port, s, count, clps711xuart_console_putchar);
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/*
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* Finally, wait for transmitter to become empty
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* and restore the uart state.
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*/
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do {
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status = clps_readl(SYSFLG(port));
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} while (status & SYSFLG_UBUSY);
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clps_writel(syscon, SYSCON(port));
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}
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static void __init
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clps711xuart_console_get_options(struct uart_port *port, int *baud,
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int *parity, int *bits)
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{
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if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
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unsigned int ubrlcr, quot;
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ubrlcr = clps_readl(UBRLCR(port));
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*parity = 'n';
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if (ubrlcr & UBRLCR_PRTEN) {
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if (ubrlcr & UBRLCR_EVENPRT)
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*parity = 'e';
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else
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*parity = 'o';
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}
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if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
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*bits = 7;
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else
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*bits = 8;
|
|
|
|
quot = ubrlcr & UBRLCR_BAUD_MASK;
|
|
*baud = port->uartclk / (16 * (quot + 1));
|
|
}
|
|
}
|
|
|
|
static int __init clps711xuart_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 38400;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
port = uart_get_console(clps711x_ports, UART_NR, co);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
clps711xuart_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver clps711x_reg;
|
|
static struct console clps711x_console = {
|
|
.name = "ttyCL",
|
|
.write = clps711xuart_console_write,
|
|
.device = uart_console_device,
|
|
.setup = clps711xuart_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &clps711x_reg,
|
|
};
|
|
|
|
static int __init clps711xuart_console_init(void)
|
|
{
|
|
register_console(&clps711x_console);
|
|
return 0;
|
|
}
|
|
console_initcall(clps711xuart_console_init);
|
|
|
|
#define CLPS711X_CONSOLE &clps711x_console
|
|
#else
|
|
#define CLPS711X_CONSOLE NULL
|
|
#endif
|
|
|
|
static struct uart_driver clps711x_reg = {
|
|
.driver_name = "ttyCL",
|
|
.dev_name = "ttyCL",
|
|
.major = SERIAL_CLPS711X_MAJOR,
|
|
.minor = SERIAL_CLPS711X_MINOR,
|
|
.nr = UART_NR,
|
|
|
|
.cons = CLPS711X_CONSOLE,
|
|
};
|
|
|
|
static int __init clps711xuart_init(void)
|
|
{
|
|
int ret, i;
|
|
|
|
printk(KERN_INFO "Serial: CLPS711x driver $Revision: 1.42 $\n");
|
|
|
|
ret = uart_register_driver(&clps711x_reg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < UART_NR; i++)
|
|
uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit clps711xuart_exit(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < UART_NR; i++)
|
|
uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
|
|
|
|
uart_unregister_driver(&clps711x_reg);
|
|
}
|
|
|
|
module_init(clps711xuart_init);
|
|
module_exit(clps711xuart_exit);
|
|
|
|
MODULE_AUTHOR("Deep Blue Solutions Ltd");
|
|
MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR);
|