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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dfc25e4503
These cleanup patches are mainly move stuff around and should all
be harmless. They are mainly split out so that other branches can
be based on top to avoid conflicts.
Notable changes are:
* We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no
longer used. (Uwe Kleine-König)
* The Qualcomm MSM platform is split out into legacy mach-msm and
new-style mach-qcom, to allow easier maintainance of the new
hardware support without regressions. (Kumar Gala)
* A rework of some of the Kconfig logic to simplify multiplatform
support (Rob Herring)
* Samsung Exynos gets closer to supporting multiplatform (Sachin
Kamat and others)
* mach-bcm3528 gets merged into mach-bcm (Stephen Warren)
* at91 gains some common clock framework support (Alexandre Belloni,
Jean-Jacques Hiblot and other French people).
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Merge tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann:
"These cleanup patches are mainly move stuff around and should all be
harmless. They are mainly split out so that other branches can be
based on top to avoid conflicts.
Notable changes are:
- We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no
longer used (Uwe Kleine-König)
- The Qualcomm MSM platform is split out into legacy mach-msm and
new-style mach-qcom, to allow easier maintainance of the new
hardware support without regressions (Kumar Gala)
- A rework of some of the Kconfig logic to simplify multiplatform
support (Rob Herring)
- Samsung Exynos gets closer to supporting multiplatform (Sachin
Kamat and others)
- mach-bcm3528 gets merged into mach-bcm (Stephen Warren)
- at91 gains some common clock framework support (Alexandre Belloni,
Jean-Jacques Hiblot and other French people)"
* tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (89 commits)
ARM: hisi: select HAVE_ARM_SCU only for SMP
ARM: efm32: allow uncompress debug output
ARM: prima2: build reset code standalone
ARM: at91: add PWM clock
ARM: at91: move sam9261 SoC to common clk
ARM: at91: prepare common clk transition for sam9261 SoC
ARM: at91: updated the at91_dt_defconfig with support for the ADS7846
ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek
ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs
ARM: at91: dt: Add at91sam9261 dt SoC support
ARM: at91: switch sam9rl to common clock framework
ARM: at91/dt: define main clk frequency of at91sam9rlek
ARM: at91/dt: define at91sam9rl clocks
ARM: at91: prepare common clk transition for sam9rl SoCs
ARM: at91: prepare sam9 dt boards transition to common clk
ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek
ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs
ARM: at91: Add at91sam9rl DT SoC support
ARM: at91: prepare at91sam9rl DT transition
ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig
...
93 lines
2.1 KiB
C
93 lines
2.1 KiB
C
/*
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* linux/arch/arm/common/time-acorn.c
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*
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* Copyright (c) 1996-2000 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 24-Sep-1996 RMK Created
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* 10-Oct-1996 RMK Brought up to date with arch-sa110eval
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* 04-Dec-1997 RMK Updated for new arch/arm/time.c
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* 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500
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*/
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/hardware/ioc.h>
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#include <asm/mach/time.h>
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#define RPC_CLOCK_FREQ 2000000
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#define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ)
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static u32 ioc_timer_gettimeoffset(void)
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{
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unsigned int count1, count2, status;
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long offset;
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ioc_writeb (0, IOC_T0LATCH);
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barrier ();
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count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
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barrier ();
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status = ioc_readb(IOC_IRQREQA);
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barrier ();
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ioc_writeb (0, IOC_T0LATCH);
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barrier ();
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count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
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offset = count2;
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if (count2 < count1) {
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/*
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* We have not had an interrupt between reading count1
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* and count2.
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*/
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if (status & (1 << 5))
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offset -= RPC_LATCH;
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} else if (count2 > count1) {
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/*
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* We have just had another interrupt between reading
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* count1 and count2.
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*/
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offset -= RPC_LATCH;
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}
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offset = (RPC_LATCH - offset) * (tick_nsec / 1000);
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return DIV_ROUND_CLOSEST(offset, RPC_LATCH) * 1000;
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}
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void __init ioctime_init(void)
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{
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ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL);
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ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH);
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ioc_writeb(0, IOC_T0GO);
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}
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static irqreturn_t
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ioc_timer_interrupt(int irq, void *dev_id)
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{
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timer_tick();
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return IRQ_HANDLED;
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}
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static struct irqaction ioc_timer_irq = {
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.name = "timer",
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.handler = ioc_timer_interrupt
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};
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/*
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* Set up timer interrupt.
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*/
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void __init ioc_timer_init(void)
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{
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arch_gettimeoffset = ioc_timer_gettimeoffset;
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ioctime_init();
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setup_irq(IRQ_TIMER0, &ioc_timer_irq);
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}
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