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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a638b5de20
The Amazon Annapurna Labs PCIe Root Port exposes the VPD capability, but there is no actual support for it. Trying to access the VPD (for example, as part of lspci -vv or when reading the vpd sysfs file), results in the following warning print: pcieport 0001:00:00.0: VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update Signed-off-by: Jonathan Chocron <jonnyc@amazon.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
654 lines
16 KiB
C
654 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PCI VPD support
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*
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* Copyright (C) 2010 Broadcom Corporation.
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*/
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/sched/signal.h>
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#include "pci.h"
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/* VPD access through PCI 2.2+ VPD capability */
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struct pci_vpd_ops {
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ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
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ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
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int (*set_size)(struct pci_dev *dev, size_t len);
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};
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struct pci_vpd {
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const struct pci_vpd_ops *ops;
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struct bin_attribute *attr; /* Descriptor for sysfs VPD entry */
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struct mutex lock;
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unsigned int len;
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u16 flag;
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u8 cap;
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unsigned int busy:1;
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unsigned int valid:1;
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};
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/**
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* pci_read_vpd - Read one entry from Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to read
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* @buf: pointer to where to store result
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*/
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ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->read(dev, pos, count, buf);
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}
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EXPORT_SYMBOL(pci_read_vpd);
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/**
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* pci_write_vpd - Write entry to Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to write
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* @buf: buffer containing write data
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*/
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ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->write(dev, pos, count, buf);
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}
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EXPORT_SYMBOL(pci_write_vpd);
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/**
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* pci_set_vpd_size - Set size of Vital Product Data space
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* @dev: pci device struct
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* @len: size of vpd space
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*/
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int pci_set_vpd_size(struct pci_dev *dev, size_t len)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->set_size(dev, len);
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}
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EXPORT_SYMBOL(pci_set_vpd_size);
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#define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
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/**
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* pci_vpd_size - determine actual size of Vital Product Data
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* @dev: pci device struct
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* @old_size: current assumed size, also maximum allowed size
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*/
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static size_t pci_vpd_size(struct pci_dev *dev, size_t old_size)
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{
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size_t off = 0;
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unsigned char header[1+2]; /* 1 byte tag, 2 bytes length */
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while (off < old_size &&
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pci_read_vpd(dev, off, 1, header) == 1) {
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unsigned char tag;
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if (header[0] & PCI_VPD_LRDT) {
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/* Large Resource Data Type Tag */
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tag = pci_vpd_lrdt_tag(header);
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/* Only read length from known tag items */
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if ((tag == PCI_VPD_LTIN_ID_STRING) ||
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(tag == PCI_VPD_LTIN_RO_DATA) ||
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(tag == PCI_VPD_LTIN_RW_DATA)) {
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if (pci_read_vpd(dev, off+1, 2,
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&header[1]) != 2) {
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pci_warn(dev, "invalid large VPD tag %02x size at offset %zu",
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tag, off + 1);
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return 0;
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}
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off += PCI_VPD_LRDT_TAG_SIZE +
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pci_vpd_lrdt_size(header);
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}
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} else {
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/* Short Resource Data Type Tag */
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off += PCI_VPD_SRDT_TAG_SIZE +
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pci_vpd_srdt_size(header);
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tag = pci_vpd_srdt_tag(header);
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}
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if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
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return off;
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if ((tag != PCI_VPD_LTIN_ID_STRING) &&
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(tag != PCI_VPD_LTIN_RO_DATA) &&
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(tag != PCI_VPD_LTIN_RW_DATA)) {
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pci_warn(dev, "invalid %s VPD tag %02x at offset %zu",
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(header[0] & PCI_VPD_LRDT) ? "large" : "short",
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tag, off);
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return 0;
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}
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}
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return 0;
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}
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/*
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* Wait for last operation to complete.
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* This code has to spin since there is no other notification from the PCI
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* hardware. Since the VPD is often implemented by serial attachment to an
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* EEPROM, it may take many milliseconds to complete.
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*
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* Returns 0 on success, negative values indicate error.
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*/
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static int pci_vpd_wait(struct pci_dev *dev)
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{
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struct pci_vpd *vpd = dev->vpd;
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unsigned long timeout = jiffies + msecs_to_jiffies(125);
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unsigned long max_sleep = 16;
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u16 status;
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int ret;
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if (!vpd->busy)
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return 0;
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do {
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ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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&status);
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if (ret < 0)
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return ret;
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if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
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vpd->busy = 0;
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return 0;
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}
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if (fatal_signal_pending(current))
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return -EINTR;
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if (time_after(jiffies, timeout))
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break;
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usleep_range(10, max_sleep);
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if (max_sleep < 1024)
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max_sleep *= 2;
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} while (true);
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pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
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return -ETIMEDOUT;
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}
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static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
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void *arg)
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{
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struct pci_vpd *vpd = dev->vpd;
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int ret;
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loff_t end = pos + count;
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u8 *buf = arg;
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if (pos < 0)
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return -EINVAL;
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if (!vpd->valid) {
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vpd->valid = 1;
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vpd->len = pci_vpd_size(dev, vpd->len);
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}
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if (vpd->len == 0)
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return -EIO;
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if (pos > vpd->len)
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return 0;
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if (end > vpd->len) {
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end = vpd->len;
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count = end - pos;
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}
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if (mutex_lock_killable(&vpd->lock))
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return -EINTR;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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goto out;
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while (pos < end) {
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u32 val;
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unsigned int i, skip;
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ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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pos & ~3);
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if (ret < 0)
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break;
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vpd->busy = 1;
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vpd->flag = PCI_VPD_ADDR_F;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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break;
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ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
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if (ret < 0)
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break;
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skip = pos & 3;
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for (i = 0; i < sizeof(u32); i++) {
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if (i >= skip) {
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*buf++ = val;
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if (++pos == end)
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break;
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}
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val >>= 8;
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}
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}
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out:
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mutex_unlock(&vpd->lock);
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return ret ? ret : count;
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}
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static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
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const void *arg)
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{
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struct pci_vpd *vpd = dev->vpd;
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const u8 *buf = arg;
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loff_t end = pos + count;
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int ret = 0;
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if (pos < 0 || (pos & 3) || (count & 3))
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return -EINVAL;
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if (!vpd->valid) {
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vpd->valid = 1;
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vpd->len = pci_vpd_size(dev, vpd->len);
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}
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if (vpd->len == 0)
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return -EIO;
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if (end > vpd->len)
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return -EINVAL;
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if (mutex_lock_killable(&vpd->lock))
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return -EINTR;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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goto out;
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while (pos < end) {
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u32 val;
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val = *buf++;
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val |= *buf++ << 8;
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val |= *buf++ << 16;
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val |= *buf++ << 24;
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ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
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if (ret < 0)
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break;
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ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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pos | PCI_VPD_ADDR_F);
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if (ret < 0)
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break;
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vpd->busy = 1;
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vpd->flag = 0;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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break;
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pos += sizeof(u32);
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}
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out:
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mutex_unlock(&vpd->lock);
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return ret ? ret : count;
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}
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static int pci_vpd_set_size(struct pci_dev *dev, size_t len)
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{
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struct pci_vpd *vpd = dev->vpd;
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if (len == 0 || len > PCI_VPD_MAX_SIZE)
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return -EIO;
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vpd->valid = 1;
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vpd->len = len;
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return 0;
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}
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static const struct pci_vpd_ops pci_vpd_ops = {
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.read = pci_vpd_read,
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.write = pci_vpd_write,
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.set_size = pci_vpd_set_size,
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};
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static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
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void *arg)
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{
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struct pci_dev *tdev = pci_get_slot(dev->bus,
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PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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ssize_t ret;
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if (!tdev)
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return -ENODEV;
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ret = pci_read_vpd(tdev, pos, count, arg);
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pci_dev_put(tdev);
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return ret;
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}
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static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count,
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const void *arg)
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{
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struct pci_dev *tdev = pci_get_slot(dev->bus,
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PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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ssize_t ret;
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if (!tdev)
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return -ENODEV;
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ret = pci_write_vpd(tdev, pos, count, arg);
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pci_dev_put(tdev);
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return ret;
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}
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static int pci_vpd_f0_set_size(struct pci_dev *dev, size_t len)
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{
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struct pci_dev *tdev = pci_get_slot(dev->bus,
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PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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int ret;
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if (!tdev)
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return -ENODEV;
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ret = pci_set_vpd_size(tdev, len);
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pci_dev_put(tdev);
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return ret;
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}
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static const struct pci_vpd_ops pci_vpd_f0_ops = {
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.read = pci_vpd_f0_read,
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.write = pci_vpd_f0_write,
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.set_size = pci_vpd_f0_set_size,
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};
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int pci_vpd_init(struct pci_dev *dev)
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{
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struct pci_vpd *vpd;
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u8 cap;
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cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
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if (!cap)
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return -ENODEV;
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vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
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if (!vpd)
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return -ENOMEM;
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vpd->len = PCI_VPD_MAX_SIZE;
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if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0)
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vpd->ops = &pci_vpd_f0_ops;
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else
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vpd->ops = &pci_vpd_ops;
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mutex_init(&vpd->lock);
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vpd->cap = cap;
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vpd->busy = 0;
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vpd->valid = 0;
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dev->vpd = vpd;
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return 0;
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}
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void pci_vpd_release(struct pci_dev *dev)
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{
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kfree(dev->vpd);
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}
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static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr, char *buf,
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loff_t off, size_t count)
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{
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struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
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if (bin_attr->size > 0) {
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if (off > bin_attr->size)
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count = 0;
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else if (count > bin_attr->size - off)
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count = bin_attr->size - off;
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}
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return pci_read_vpd(dev, off, count, buf);
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}
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static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr, char *buf,
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loff_t off, size_t count)
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{
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struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
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if (bin_attr->size > 0) {
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if (off > bin_attr->size)
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count = 0;
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else if (count > bin_attr->size - off)
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count = bin_attr->size - off;
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}
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return pci_write_vpd(dev, off, count, buf);
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}
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void pcie_vpd_create_sysfs_dev_files(struct pci_dev *dev)
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{
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int retval;
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struct bin_attribute *attr;
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if (!dev->vpd)
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return;
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attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
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if (!attr)
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return;
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sysfs_bin_attr_init(attr);
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attr->size = 0;
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attr->attr.name = "vpd";
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attr->attr.mode = S_IRUSR | S_IWUSR;
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attr->read = read_vpd_attr;
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attr->write = write_vpd_attr;
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retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
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if (retval) {
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kfree(attr);
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return;
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}
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dev->vpd->attr = attr;
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}
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void pcie_vpd_remove_sysfs_dev_files(struct pci_dev *dev)
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{
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if (dev->vpd && dev->vpd->attr) {
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sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
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kfree(dev->vpd->attr);
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}
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}
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int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt)
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{
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int i;
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for (i = off; i < len; ) {
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u8 val = buf[i];
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if (val & PCI_VPD_LRDT) {
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/* Don't return success of the tag isn't complete */
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if (i + PCI_VPD_LRDT_TAG_SIZE > len)
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break;
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if (val == rdt)
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return i;
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i += PCI_VPD_LRDT_TAG_SIZE +
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pci_vpd_lrdt_size(&buf[i]);
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} else {
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u8 tag = val & ~PCI_VPD_SRDT_LEN_MASK;
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if (tag == rdt)
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return i;
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if (tag == PCI_VPD_SRDT_END)
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break;
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i += PCI_VPD_SRDT_TAG_SIZE +
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pci_vpd_srdt_size(&buf[i]);
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}
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}
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(pci_vpd_find_tag);
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int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
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unsigned int len, const char *kw)
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{
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int i;
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for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
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if (buf[i + 0] == kw[0] &&
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buf[i + 1] == kw[1])
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return i;
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i += PCI_VPD_INFO_FLD_HDR_SIZE +
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pci_vpd_info_field_size(&buf[i]);
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}
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return -ENOENT;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pci_vpd_find_info_keyword);
|
|
|
|
#ifdef CONFIG_PCI_QUIRKS
|
|
/*
|
|
* Quirk non-zero PCI functions to route VPD access through function 0 for
|
|
* devices that share VPD resources between functions. The functions are
|
|
* expected to be identical devices.
|
|
*/
|
|
static void quirk_f0_vpd_link(struct pci_dev *dev)
|
|
{
|
|
struct pci_dev *f0;
|
|
|
|
if (!PCI_FUNC(dev->devfn))
|
|
return;
|
|
|
|
f0 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
|
|
if (!f0)
|
|
return;
|
|
|
|
if (f0->vpd && dev->class == f0->class &&
|
|
dev->vendor == f0->vendor && dev->device == f0->device)
|
|
dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
|
|
|
|
pci_dev_put(f0);
|
|
}
|
|
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
|
|
PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
|
|
|
|
/*
|
|
* If a device follows the VPD format spec, the PCI core will not read or
|
|
* write past the VPD End Tag. But some vendors do not follow the VPD
|
|
* format spec, so we can't tell how much data is safe to access. Devices
|
|
* may behave unpredictably if we access too much. Blacklist these devices
|
|
* so we don't touch VPD at all.
|
|
*/
|
|
static void quirk_blacklist_vpd(struct pci_dev *dev)
|
|
{
|
|
if (dev->vpd) {
|
|
dev->vpd->len = 0;
|
|
pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
|
|
}
|
|
}
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID,
|
|
quirk_blacklist_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_QLOGIC, 0x2261, quirk_blacklist_vpd);
|
|
/*
|
|
* The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
|
|
* device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
|
|
*/
|
|
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
|
|
PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
|
|
|
|
/*
|
|
* For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
|
|
* VPD end tag will hang the device. This problem was initially
|
|
* observed when a vpd entry was created in sysfs
|
|
* ('/sys/bus/pci/devices/<id>/vpd'). A read to this sysfs entry
|
|
* will dump 32k of data. Reading a full 32k will cause an access
|
|
* beyond the VPD end tag causing the device to hang. Once the device
|
|
* is hung, the bnx2 driver will not be able to reset the device.
|
|
* We believe that it is legal to read beyond the end tag and
|
|
* therefore the solution is to limit the read/write length.
|
|
*/
|
|
static void quirk_brcm_570x_limit_vpd(struct pci_dev *dev)
|
|
{
|
|
/*
|
|
* Only disable the VPD capability for 5706, 5706S, 5708,
|
|
* 5708S and 5709 rev. A
|
|
*/
|
|
if ((dev->device == PCI_DEVICE_ID_NX2_5706) ||
|
|
(dev->device == PCI_DEVICE_ID_NX2_5706S) ||
|
|
(dev->device == PCI_DEVICE_ID_NX2_5708) ||
|
|
(dev->device == PCI_DEVICE_ID_NX2_5708S) ||
|
|
((dev->device == PCI_DEVICE_ID_NX2_5709) &&
|
|
(dev->revision & 0xf0) == 0x0)) {
|
|
if (dev->vpd)
|
|
dev->vpd->len = 0x80;
|
|
}
|
|
}
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
|
PCI_DEVICE_ID_NX2_5706,
|
|
quirk_brcm_570x_limit_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
|
PCI_DEVICE_ID_NX2_5706S,
|
|
quirk_brcm_570x_limit_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
|
PCI_DEVICE_ID_NX2_5708,
|
|
quirk_brcm_570x_limit_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
|
PCI_DEVICE_ID_NX2_5708S,
|
|
quirk_brcm_570x_limit_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
|
PCI_DEVICE_ID_NX2_5709,
|
|
quirk_brcm_570x_limit_vpd);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
|
|
PCI_DEVICE_ID_NX2_5709S,
|
|
quirk_brcm_570x_limit_vpd);
|
|
|
|
static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
|
|
{
|
|
int chip = (dev->device & 0xf000) >> 12;
|
|
int func = (dev->device & 0x0f00) >> 8;
|
|
int prod = (dev->device & 0x00ff) >> 0;
|
|
|
|
/*
|
|
* If this is a T3-based adapter, there's a 1KB VPD area at offset
|
|
* 0xc00 which contains the preferred VPD values. If this is a T4 or
|
|
* later based adapter, the special VPD is at offset 0x400 for the
|
|
* Physical Functions (the SR-IOV Virtual Functions have no VPD
|
|
* Capabilities). The PCI VPD Access core routines will normally
|
|
* compute the size of the VPD by parsing the VPD Data Structure at
|
|
* offset 0x000. This will result in silent failures when attempting
|
|
* to accesses these other VPD areas which are beyond those computed
|
|
* limits.
|
|
*/
|
|
if (chip == 0x0 && prod >= 0x20)
|
|
pci_set_vpd_size(dev, 8192);
|
|
else if (chip >= 0x4 && func < 0x8)
|
|
pci_set_vpd_size(dev, 2048);
|
|
}
|
|
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
|
|
quirk_chelsio_extend_vpd);
|
|
|
|
#endif
|