mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 07:56:48 +07:00
7c0f6ba682
This was entirely automated, using the script by Al:
PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>'
sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \
$(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h)
to do the replacement at the end of the merge window.
Requested-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
626 lines
13 KiB
C
626 lines
13 KiB
C
/*
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* Flash memory interface rev.5 driver for the Intel
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* Flash chips used on the NetWinder.
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*
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* 20/08/2000 RMK use __ioremap to map flash into virtual memory
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* make a few more places use "volatile"
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* 22/05/2001 RMK - Lock read against write
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* - merge printk level changes (with mods) from Alan Cox.
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* - use *ppos as the file position, not file->f_pos.
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* - fix check for out of range pos and r/w size
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*
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* Please note that we are tampering with the only flash chip in the
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* machine, which contains the bootup code. We therefore have the
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* power to convert these machines into doorstops...
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/proc_fs.h>
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#include <linux/miscdevice.h>
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#include <linux/spinlock.h>
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#include <linux/rwsem.h>
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <linux/jiffies.h>
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#include <asm/hardware/dec21285.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <linux/uaccess.h>
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/*****************************************************************************/
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#include <asm/nwflash.h>
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#define NWFLASH_VERSION "6.4"
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static DEFINE_MUTEX(flash_mutex);
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static void kick_open(void);
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static int get_flash_id(void);
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static int erase_block(int nBlock);
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static int write_block(unsigned long p, const char __user *buf, int count);
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#define KFLASH_SIZE 1024*1024 //1 Meg
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#define KFLASH_SIZE4 4*1024*1024 //4 Meg
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#define KFLASH_ID 0x89A6 //Intel flash
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#define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
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static bool flashdebug; //if set - we will display progress msgs
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static int gbWriteEnable;
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static int gbWriteBase64Enable;
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static volatile unsigned char *FLASH_BASE;
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static int gbFlashSize = KFLASH_SIZE;
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static DEFINE_MUTEX(nwflash_mutex);
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static int get_flash_id(void)
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{
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volatile unsigned int c1, c2;
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/*
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* try to get flash chip ID
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*/
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kick_open();
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c2 = inb(0x80);
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
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udelay(15);
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c1 = *(volatile unsigned char *) FLASH_BASE;
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c2 = inb(0x80);
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/*
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* on 4 Meg flash the second byte is actually at offset 2...
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*/
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if (c1 == 0xB0)
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c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
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else
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c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
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c2 += (c1 << 8);
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/*
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* set it back to read mode
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
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if (c2 == KFLASH_ID4)
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gbFlashSize = KFLASH_SIZE4;
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return c2;
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}
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static long flash_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
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{
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mutex_lock(&flash_mutex);
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switch (cmd) {
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case CMD_WRITE_DISABLE:
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gbWriteBase64Enable = 0;
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gbWriteEnable = 0;
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break;
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case CMD_WRITE_ENABLE:
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gbWriteEnable = 1;
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break;
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case CMD_WRITE_BASE64K_ENABLE:
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gbWriteBase64Enable = 1;
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break;
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default:
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gbWriteBase64Enable = 0;
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gbWriteEnable = 0;
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mutex_unlock(&flash_mutex);
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return -EINVAL;
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}
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mutex_unlock(&flash_mutex);
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return 0;
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}
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static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
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loff_t *ppos)
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{
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ssize_t ret;
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if (flashdebug)
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printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
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"buffer=%p, count=0x%zx.\n", *ppos, buf, size);
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/*
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* We now lock against reads and writes. --rmk
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*/
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if (mutex_lock_interruptible(&nwflash_mutex))
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return -ERESTARTSYS;
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ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
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mutex_unlock(&nwflash_mutex);
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return ret;
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}
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static ssize_t flash_write(struct file *file, const char __user *buf,
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size_t size, loff_t * ppos)
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{
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unsigned long p = *ppos;
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unsigned int count = size;
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int written;
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int nBlock, temp, rc;
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int i, j;
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if (flashdebug)
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printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
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p, buf, count);
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if (!gbWriteEnable)
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return -EINVAL;
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if (p < 64 * 1024 && (!gbWriteBase64Enable))
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return -EINVAL;
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/*
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* check for out of range pos or count
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*/
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if (p >= gbFlashSize)
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return count ? -ENXIO : 0;
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if (count > gbFlashSize - p)
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count = gbFlashSize - p;
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if (!access_ok(VERIFY_READ, buf, count))
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return -EFAULT;
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/*
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* We now lock against reads and writes. --rmk
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*/
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if (mutex_lock_interruptible(&nwflash_mutex))
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return -ERESTARTSYS;
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written = 0;
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nBlock = (int) p >> 16; //block # of 64K bytes
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/*
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* # of 64K blocks to erase and write
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*/
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temp = ((int) (p + count) >> 16) - nBlock + 1;
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/*
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* write ends at exactly 64k boundary?
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*/
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if (((int) (p + count) & 0xFFFF) == 0)
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temp -= 1;
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if (flashdebug)
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printk(KERN_DEBUG "flash_write: writing %d block(s) "
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"starting at %d.\n", temp, nBlock);
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for (; temp; temp--, nBlock++) {
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if (flashdebug)
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printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
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/*
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* first we have to erase the block(s), where we will write...
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*/
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i = 0;
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j = 0;
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RetryBlock:
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do {
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rc = erase_block(nBlock);
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i++;
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} while (rc && i < 10);
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if (rc) {
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printk(KERN_ERR "flash_write: erase error %x\n", rc);
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break;
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}
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if (flashdebug)
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printk(KERN_DEBUG "flash_write: writing offset %lX, "
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"from buf %p, bytes left %X.\n", p, buf,
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count - written);
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/*
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* write_block will limit write to space left in this block
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*/
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rc = write_block(p, buf, count - written);
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j++;
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/*
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* if somehow write verify failed? Can't happen??
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*/
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if (!rc) {
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/*
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* retry up to 10 times
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*/
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if (j < 10)
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goto RetryBlock;
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else
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/*
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* else quit with error...
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*/
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rc = -1;
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}
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if (rc < 0) {
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printk(KERN_ERR "flash_write: write error %X\n", rc);
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break;
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}
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p += rc;
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buf += rc;
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written += rc;
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*ppos += rc;
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if (flashdebug)
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printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
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}
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mutex_unlock(&nwflash_mutex);
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return written;
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}
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/*
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* The memory devices use the full 32/64 bits of the offset, and so we cannot
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* check against negative addresses: they are ok. The return value is weird,
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* though, in that case (0).
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*
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* also note that seeking relative to the "end of file" isn't supported:
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* it has no meaning, so it returns -EINVAL.
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*/
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static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
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{
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loff_t ret;
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mutex_lock(&flash_mutex);
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if (flashdebug)
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printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
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(unsigned int) offset, orig);
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ret = no_seek_end_llseek_size(file, offset, orig, gbFlashSize);
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mutex_unlock(&flash_mutex);
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return ret;
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}
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/*
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* assume that main Write routine did the parameter checking...
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* so just go ahead and erase, what requested!
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*/
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static int erase_block(int nBlock)
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{
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volatile unsigned int c1;
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volatile unsigned char *pWritePtr;
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unsigned long timeout;
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int temp, temp1;
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/*
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* reset footbridge to the correct offset 0 (...0..3)
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*/
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*CSR_ROMWRITEREG = 0;
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/*
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* dummy ROM read
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*/
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c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
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kick_open();
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/*
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* reset status if old errors
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
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/*
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* erase a block...
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* aim at the middle of a current block...
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*/
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pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
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/*
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* dummy read
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*/
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c1 = *pWritePtr;
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kick_open();
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/*
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* erase
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*/
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*(volatile unsigned char *) pWritePtr = 0x20;
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/*
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* confirm
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*/
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*(volatile unsigned char *) pWritePtr = 0xD0;
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/*
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* wait 10 ms
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*/
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msleep(10);
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/*
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* wait while erasing in process (up to 10 sec)
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*/
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timeout = jiffies + 10 * HZ;
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c1 = 0;
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while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
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msleep(10);
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/*
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* read any address
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*/
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c1 = *(volatile unsigned char *) (pWritePtr);
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// printk("Flash_erase: status=%X.\n",c1);
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}
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/*
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* set flash for normal read access
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*/
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kick_open();
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// *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
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*(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
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/*
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* check if erase errors were reported
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*/
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if (c1 & 0x20) {
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printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
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/*
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* reset error
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
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return -2;
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}
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/*
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* just to make sure - verify if erased OK...
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*/
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msleep(10);
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pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
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for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
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if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
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printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
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pWritePtr, temp1);
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return -1;
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}
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}
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return 0;
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}
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/*
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* write_block will limit number of bytes written to the space in this block
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*/
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static int write_block(unsigned long p, const char __user *buf, int count)
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{
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volatile unsigned int c1;
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volatile unsigned int c2;
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unsigned char *pWritePtr;
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unsigned int uAddress;
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unsigned int offset;
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unsigned long timeout;
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unsigned long timeout1;
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pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
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/*
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* check if write will end in this block....
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*/
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offset = p & 0xFFFF;
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if (offset + count > 0x10000)
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count = 0x10000 - offset;
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/*
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* wait up to 30 sec for this block
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*/
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timeout = jiffies + 30 * HZ;
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for (offset = 0; offset < count; offset++, pWritePtr++) {
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uAddress = (unsigned int) pWritePtr;
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uAddress &= 0xFFFFFFFC;
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if (__get_user(c2, buf + offset))
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return -EFAULT;
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WriteRetry:
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/*
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* dummy read
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*/
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c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
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/*
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* kick open the write gate
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*/
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kick_open();
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/*
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* program footbridge to the correct offset...0..3
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*/
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*CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
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/*
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* write cmd
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*/
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*(volatile unsigned char *) (uAddress) = 0x40;
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/*
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* data to write
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*/
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*(volatile unsigned char *) (uAddress) = c2;
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/*
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* get status
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
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c1 = 0;
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/*
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* wait up to 1 sec for this byte
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*/
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timeout1 = jiffies + 1 * HZ;
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/*
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* while not ready...
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*/
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while (!(c1 & 0x80) && time_before(jiffies, timeout1))
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c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
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/*
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* if timeout getting status
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*/
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if (time_after_eq(jiffies, timeout1)) {
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kick_open();
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/*
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* reset err
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
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goto WriteRetry;
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}
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/*
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* switch on read access, as a default flash operation mode
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*/
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kick_open();
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/*
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* read access
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
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/*
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* if hardware reports an error writing, and not timeout -
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* reset the chip and retry
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*/
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if (c1 & 0x10) {
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kick_open();
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/*
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* reset err
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*/
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*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
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/*
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* before timeout?
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*/
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if (time_before(jiffies, timeout)) {
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if (flashdebug)
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printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
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pWritePtr - FLASH_BASE);
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/*
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* wait couple ms
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*/
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msleep(10);
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goto WriteRetry;
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} else {
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printk(KERN_ERR "write_block: timeout at 0x%X\n",
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pWritePtr - FLASH_BASE);
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/*
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* return error -2
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*/
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return -2;
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}
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}
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}
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msleep(10);
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pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
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for (offset = 0; offset < count; offset++) {
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char c, c1;
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if (__get_user(c, buf))
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return -EFAULT;
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buf++;
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if ((c1 = *pWritePtr++) != c) {
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printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
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pWritePtr - FLASH_BASE, c1, c);
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return 0;
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}
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}
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return count;
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}
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static void kick_open(void)
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{
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unsigned long flags;
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/*
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* we want to write a bit pattern XXX1 to Xilinx to enable
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* the write gate, which will be open for about the next 2ms.
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*/
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raw_spin_lock_irqsave(&nw_gpio_lock, flags);
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nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
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/*
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* let the ISA bus to catch on...
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*/
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udelay(25);
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}
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static const struct file_operations flash_fops =
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{
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.owner = THIS_MODULE,
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.llseek = flash_llseek,
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.read = flash_read,
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.write = flash_write,
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.unlocked_ioctl = flash_ioctl,
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};
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|
static struct miscdevice flash_miscdev =
|
|
{
|
|
FLASH_MINOR,
|
|
"nwflash",
|
|
&flash_fops
|
|
};
|
|
|
|
static int __init nwflash_init(void)
|
|
{
|
|
int ret = -ENODEV;
|
|
|
|
if (machine_is_netwinder()) {
|
|
int id;
|
|
|
|
FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
|
|
if (!FLASH_BASE)
|
|
goto out;
|
|
|
|
id = get_flash_id();
|
|
if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
|
|
ret = -ENXIO;
|
|
iounmap((void *)FLASH_BASE);
|
|
printk("Flash: incorrect ID 0x%04X.\n", id);
|
|
goto out;
|
|
}
|
|
|
|
printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
|
|
NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
|
|
|
|
ret = misc_register(&flash_miscdev);
|
|
if (ret < 0) {
|
|
iounmap((void *)FLASH_BASE);
|
|
}
|
|
}
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static void __exit nwflash_exit(void)
|
|
{
|
|
misc_deregister(&flash_miscdev);
|
|
iounmap((void *)FLASH_BASE);
|
|
}
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_param(flashdebug, bool, 0644);
|
|
|
|
module_init(nwflash_init);
|
|
module_exit(nwflash_exit);
|