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6a113ddc03
Add infrastructure for errata-handling and handle two known erratas in the IOMMUv2 code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
54 lines
1.7 KiB
C
54 lines
1.7 KiB
C
/*
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* Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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* Leo Duran <leo.duran@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ASM_X86_AMD_IOMMU_H
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#define _ASM_X86_AMD_IOMMU_H
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#include <linux/irqreturn.h>
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#ifdef CONFIG_AMD_IOMMU
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extern int amd_iommu_detect(void);
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/**
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* amd_iommu_enable_device_erratum() - Enable erratum workaround for device
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* in the IOMMUv2 driver
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* @pdev: The PCI device the workaround is necessary for
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* @erratum: The erratum workaround to enable
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*
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* Possible values for the erratum number are for now:
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* - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
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* is enabled
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* - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
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* requests to one
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*/
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#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
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#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
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extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
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#else
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static inline int amd_iommu_detect(void) { return -ENODEV; }
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#endif
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#endif /* _ASM_X86_AMD_IOMMU_H */
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