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7148480265
Factor out the GICv3 and ITS-specific documentation into a separate documentation file. Add description for how to access distributor, redistributor, and CPU interface registers for GICv3 in this new file, and add a group for accessing level triggered IRQ information for GICv3 as well. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
39 lines
1.4 KiB
Plaintext
39 lines
1.4 KiB
Plaintext
ARM Virtual Interrupt Translation Service (ITS)
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===============================================
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Device types supported:
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KVM_DEV_TYPE_ARM_VGIC_ITS ARM Interrupt Translation Service Controller
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The ITS allows MSI(-X) interrupts to be injected into guests. This extension is
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optional. Creating a virtual ITS controller also requires a host GICv3 (see
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arm-vgic-v3.txt), but does not depend on having physical ITS controllers.
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There can be multiple ITS controllers per guest, each of them has to have
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a separate, non-overlapping MMIO region.
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Groups:
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KVM_DEV_ARM_VGIC_GRP_ADDR
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Attributes:
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KVM_VGIC_ITS_ADDR_TYPE (rw, 64-bit)
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Base address in the guest physical address space of the GICv3 ITS
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control register frame.
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This address needs to be 64K aligned and the region covers 128K.
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Errors:
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-E2BIG: Address outside of addressable IPA range
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-EINVAL: Incorrectly aligned address
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-EEXIST: Address already configured
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-EFAULT: Invalid user pointer for attr->addr.
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-ENODEV: Incorrect attribute or the ITS is not supported.
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KVM_DEV_ARM_VGIC_GRP_CTRL
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Attributes:
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KVM_DEV_ARM_VGIC_CTRL_INIT
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request the initialization of the ITS, no additional parameter in
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kvm_device_attr.addr.
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Errors:
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-ENXIO: ITS not properly configured as required prior to setting
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this attribute
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-ENOMEM: Memory shortage when allocating ITS internal data
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