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Move a long comment from lib/crc32.c to Documentation/crc32.txt where it will more likely get read. Edited the resulting document to add an explanation of the slicing-by-n algorithm. [djwong@us.ibm.com: minor changelog tweaks] [akpm@linux-foundation.org: fix typo, per George] Signed-off-by: George Spelvin <linux@horizon.com> Signed-off-by: Bob Pearson <rpearson@systemfabricworks.com> Signed-off-by: Darrick J. Wong <djwong@us.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
183 lines
8.5 KiB
Plaintext
183 lines
8.5 KiB
Plaintext
A brief CRC tutorial.
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A CRC is a long-division remainder. You add the CRC to the message,
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and the whole thing (message+CRC) is a multiple of the given
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CRC polynomial. To check the CRC, you can either check that the
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CRC matches the recomputed value, *or* you can check that the
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remainder computed on the message+CRC is 0. This latter approach
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is used by a lot of hardware implementations, and is why so many
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protocols put the end-of-frame flag after the CRC.
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It's actually the same long division you learned in school, except that
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- We're working in binary, so the digits are only 0 and 1, and
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- When dividing polynomials, there are no carries. Rather than add and
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subtract, we just xor. Thus, we tend to get a bit sloppy about
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the difference between adding and subtracting.
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Like all division, the remainder is always smaller than the divisor.
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To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
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Since it's 33 bits long, bit 32 is always going to be set, so usually the
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CRC is written in hex with the most significant bit omitted. (If you're
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familiar with the IEEE 754 floating-point format, it's the same idea.)
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Note that a CRC is computed over a string of *bits*, so you have
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to decide on the endianness of the bits within each byte. To get
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the best error-detecting properties, this should correspond to the
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order they're actually sent. For example, standard RS-232 serial is
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little-endian; the most significant bit (sometimes used for parity)
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is sent last. And when appending a CRC word to a message, you should
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do it in the right order, matching the endianness.
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Just like with ordinary division, you proceed one digit (bit) at a time.
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Each step of the division you take one more digit (bit) of the dividend
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and append it to the current remainder. Then you figure out the
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appropriate multiple of the divisor to subtract to being the remainder
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back into range. In binary, this is easy - it has to be either 0 or 1,
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and to make the XOR cancel, it's just a copy of bit 32 of the remainder.
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When computing a CRC, we don't care about the quotient, so we can
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throw the quotient bit away, but subtract the appropriate multiple of
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the polynomial from the remainder and we're back to where we started,
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ready to process the next bit.
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A big-endian CRC written this way would be coded like:
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for (i = 0; i < input_bits; i++) {
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multiple = remainder & 0x80000000 ? CRCPOLY : 0;
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remainder = (remainder << 1 | next_input_bit()) ^ multiple;
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}
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Notice how, to get at bit 32 of the shifted remainder, we look
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at bit 31 of the remainder *before* shifting it.
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But also notice how the next_input_bit() bits we're shifting into
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the remainder don't actually affect any decision-making until
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32 bits later. Thus, the first 32 cycles of this are pretty boring.
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Also, to add the CRC to a message, we need a 32-bit-long hole for it at
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the end, so we have to add 32 extra cycles shifting in zeros at the
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end of every message,
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These details lead to a standard trick: rearrange merging in the
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next_input_bit() until the moment it's needed. Then the first 32 cycles
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can be precomputed, and merging in the final 32 zero bits to make room
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for the CRC can be skipped entirely. This changes the code to:
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for (i = 0; i < input_bits; i++) {
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remainder ^= next_input_bit() << 31;
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multiple = (remainder & 0x80000000) ? CRCPOLY : 0;
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remainder = (remainder << 1) ^ multiple;
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}
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With this optimization, the little-endian code is particularly simple:
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for (i = 0; i < input_bits; i++) {
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remainder ^= next_input_bit();
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multiple = (remainder & 1) ? CRCPOLY : 0;
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remainder = (remainder >> 1) ^ multiple;
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}
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The most significant coefficient of the remainder polynomial is stored
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in the least significant bit of the binary "remainder" variable.
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The other details of endianness have been hidden in CRCPOLY (which must
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be bit-reversed) and next_input_bit().
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As long as next_input_bit is returning the bits in a sensible order, we don't
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*have* to wait until the last possible moment to merge in additional bits.
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We can do it 8 bits at a time rather than 1 bit at a time:
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for (i = 0; i < input_bytes; i++) {
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remainder ^= next_input_byte() << 24;
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for (j = 0; j < 8; j++) {
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multiple = (remainder & 0x80000000) ? CRCPOLY : 0;
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remainder = (remainder << 1) ^ multiple;
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}
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}
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Or in little-endian:
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for (i = 0; i < input_bytes; i++) {
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remainder ^= next_input_byte();
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for (j = 0; j < 8; j++) {
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multiple = (remainder & 1) ? CRCPOLY : 0;
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remainder = (remainder >> 1) ^ multiple;
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}
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}
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If the input is a multiple of 32 bits, you can even XOR in a 32-bit
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word at a time and increase the inner loop count to 32.
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You can also mix and match the two loop styles, for example doing the
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bulk of a message byte-at-a-time and adding bit-at-a-time processing
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for any fractional bytes at the end.
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To reduce the number of conditional branches, software commonly uses
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the byte-at-a-time table method, popularized by Dilip V. Sarwate,
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"Computation of Cyclic Redundancy Checks via Table Look-Up", Comm. ACM
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v.31 no.8 (August 1998) p. 1008-1013.
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Here, rather than just shifting one bit of the remainder to decide
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in the correct multiple to subtract, we can shift a byte at a time.
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This produces a 40-bit (rather than a 33-bit) intermediate remainder,
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and the correct multiple of the polynomial to subtract is found using
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a 256-entry lookup table indexed by the high 8 bits.
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(The table entries are simply the CRC-32 of the given one-byte messages.)
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When space is more constrained, smaller tables can be used, e.g. two
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4-bit shifts followed by a lookup in a 16-entry table.
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It is not practical to process much more than 8 bits at a time using this
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technique, because tables larger than 256 entries use too much memory and,
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more importantly, too much of the L1 cache.
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To get higher software performance, a "slicing" technique can be used.
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See "High Octane CRC Generation with the Intel Slicing-by-8 Algorithm",
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ftp://download.intel.com/technology/comms/perfnet/download/slicing-by-8.pdf
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This does not change the number of table lookups, but does increase
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the parallelism. With the classic Sarwate algorithm, each table lookup
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must be completed before the index of the next can be computed.
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A "slicing by 2" technique would shift the remainder 16 bits at a time,
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producing a 48-bit intermediate remainder. Rather than doing a single
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lookup in a 65536-entry table, the two high bytes are looked up in
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two different 256-entry tables. Each contains the remainder required
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to cancel out the corresponding byte. The tables are different because the
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polynomials to cancel are different. One has non-zero coefficients from
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x^32 to x^39, while the other goes from x^40 to x^47.
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Since modern processors can handle many parallel memory operations, this
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takes barely longer than a single table look-up and thus performs almost
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twice as fast as the basic Sarwate algorithm.
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This can be extended to "slicing by 4" using 4 256-entry tables.
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Each step, 32 bits of data is fetched, XORed with the CRC, and the result
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broken into bytes and looked up in the tables. Because the 32-bit shift
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leaves the low-order bits of the intermediate remainder zero, the
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final CRC is simply the XOR of the 4 table look-ups.
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But this still enforces sequential execution: a second group of table
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look-ups cannot begin until the previous groups 4 table look-ups have all
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been completed. Thus, the processor's load/store unit is sometimes idle.
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To make maximum use of the processor, "slicing by 8" performs 8 look-ups
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in parallel. Each step, the 32-bit CRC is shifted 64 bits and XORed
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with 64 bits of input data. What is important to note is that 4 of
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those 8 bytes are simply copies of the input data; they do not depend
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on the previous CRC at all. Thus, those 4 table look-ups may commence
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immediately, without waiting for the previous loop iteration.
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By always having 4 loads in flight, a modern superscalar processor can
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be kept busy and make full use of its L1 cache.
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Two more details about CRC implementation in the real world:
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Normally, appending zero bits to a message which is already a multiple
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of a polynomial produces a larger multiple of that polynomial. Thus,
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a basic CRC will not detect appended zero bits (or bytes). To enable
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a CRC to detect this condition, it's common to invert the CRC before
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appending it. This makes the remainder of the message+crc come out not
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as zero, but some fixed non-zero value. (The CRC of the inversion
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pattern, 0xffffffff.)
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The same problem applies to zero bits prepended to the message, and a
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similar solution is used. Instead of starting the CRC computation with
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a remainder of 0, an initial remainder of all ones is used. As long as
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you start the same way on decoding, it doesn't make a difference.
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