Caesar Wang e306bc16c5 ARM: rockchip: ensure CPU to enter WFI/WFE state ... The patch can ensure that v7_exit_coherency_flush() in rockchip_cpu_die() executed in time. The mdelay(1) has enough time to fix the problem of CPU offlining. That's a workaround way in rockchip hotplug code, At least, we haven't a better way to solve it. Who know, that maybe fixed by chip (hardware) in the future. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2015-07-06 00:46:59 +02:00
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core.h	ARM: v7 setup function should invalidate L1 cache	2015-06-01 11:30:26 +01:00
headsmp.S	ARM: v7 setup function should invalidate L1 cache	2015-06-01 11:30:26 +01:00
Kconfig	ARM: rockchip: force built-in regulator support for PM	2015-02-18 12:20:30 +01:00
Makefile	ARM: rockchip: add suspend and resume for RK3288	2014-12-31 16:16:50 +01:00
platsmp.c	ARM: rockchip: ensure CPU to enter WFI/WFE state	2015-07-06 00:46:59 +02:00
pm.c	ARM: rockchip: restore dapswjdp after suspend	2015-07-06 00:46:59 +02:00
pm.h	Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"	2015-05-13 15:47:03 +02:00
rockchip.c	rockchip: make sure timer7 is enabled on rk3288 platforms	2015-04-16 21:22:17 +02:00
sleep.S	ARM: rockchip: add suspend and resume for RK3288	2014-12-31 16:16:50 +01:00