mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 14:20:55 +07:00
a614a610ac
If an interrupt is marked with the no balancing flag, we still allow setting the affinity for such an interrupt from the kernel itself, but for interrupts which move the affinity from interrupt context via irq_move_mask_irq() this runs into a check for the no balancing flag, which in turn ends up with an endless storm of stack dumps because the move pending flag is not reset. Allow the move for interrupts which have the no balancing flag set and clear the move pending bit before checking for interrupts with the per cpu flag set. Reported-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Jiang Liu <jiang.liu@linux.intel.com> Link: http://lkml.kernel.org/r/alpine.DEB.2.11.1506201002570.4107@nanos Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
80 lines
2.0 KiB
C
80 lines
2.0 KiB
C
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include "internals.h"
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void irq_move_masked_irq(struct irq_data *idata)
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{
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struct irq_desc *desc = irq_data_to_desc(idata);
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struct irq_chip *chip = desc->irq_data.chip;
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if (likely(!irqd_is_setaffinity_pending(&desc->irq_data)))
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return;
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irqd_clr_move_pending(&desc->irq_data);
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/*
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* Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
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*/
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if (irqd_is_per_cpu(&desc->irq_data)) {
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WARN_ON(1);
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return;
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}
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if (unlikely(cpumask_empty(desc->pending_mask)))
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return;
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if (!chip->irq_set_affinity)
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return;
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assert_raw_spin_locked(&desc->lock);
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/*
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* If there was a valid mask to work with, please
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* do the disable, re-program, enable sequence.
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* This is *not* particularly important for level triggered
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* but in a edge trigger case, we might be setting rte
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* when an active trigger is coming in. This could
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* cause some ioapics to mal-function.
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* Being paranoid i guess!
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*
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* For correct operation this depends on the caller
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* masking the irqs.
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*/
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if (cpumask_any_and(desc->pending_mask, cpu_online_mask) < nr_cpu_ids)
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irq_do_set_affinity(&desc->irq_data, desc->pending_mask, false);
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cpumask_clear(desc->pending_mask);
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}
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void irq_move_irq(struct irq_data *idata)
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{
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bool masked;
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/*
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* Get top level irq_data when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled,
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* and it should be optimized away when CONFIG_IRQ_DOMAIN_HIERARCHY is
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* disabled. So we avoid an "#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY" here.
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*/
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idata = irq_desc_get_irq_data(irq_data_to_desc(idata));
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if (likely(!irqd_is_setaffinity_pending(idata)))
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return;
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if (unlikely(irqd_irq_disabled(idata)))
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return;
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/*
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* Be careful vs. already masked interrupts. If this is a
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* threaded interrupt with ONESHOT set, we can end up with an
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* interrupt storm.
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*/
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masked = irqd_irq_masked(idata);
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if (!masked)
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idata->chip->irq_mask(idata);
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irq_move_masked_irq(idata);
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if (!masked)
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idata->chip->irq_unmask(idata);
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}
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