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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e29cc1d7e8
Make sure we always have CT buffers enabled when the interrupts are enabled, so we can always handle interrupts from GuC. Also move the setting of the guc->send and guc->handler functions to the GuC communication control functions for consistency. The reorder also fixes the onion unwinding of intel_uc_init_hw, because guc_enable_communication would've left interrupts enabled when failing to enable CTB. v2: always retunr the result of ctch_enable() in intel_guc_ct_enable() (Michal) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110943 Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190621182123.31368-1-daniele.ceraolospurio@intel.com
109 lines
3.5 KiB
C
109 lines
3.5 KiB
C
/*
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* Copyright © 2016-2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef _INTEL_GUC_CT_H_
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#define _INTEL_GUC_CT_H_
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struct intel_guc;
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struct i915_vma;
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#include "intel_guc_fwif.h"
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/**
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* DOC: Command Transport (CT).
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*
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* Buffer based command transport is a replacement for MMIO based mechanism.
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* It can be used to perform both host-2-guc and guc-to-host communication.
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*/
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/** Represents single command transport buffer.
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*
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* A single command transport buffer consists of two parts, the header
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* record (command transport buffer descriptor) and the actual buffer which
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* holds the commands.
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*
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* @desc: pointer to the buffer descriptor
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* @cmds: pointer to the commands buffer
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*/
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struct intel_guc_ct_buffer {
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struct guc_ct_buffer_desc *desc;
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u32 *cmds;
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};
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/** Represents pair of command transport buffers.
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*
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* Buffers go in pairs to allow bi-directional communication.
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* To simplify the code we place both of them in the same vma.
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* Buffers from the same pair must share unique owner id.
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*
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* @vma: pointer to the vma with pair of CT buffers
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* @ctbs: buffers for sending(0) and receiving(1) commands
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* @owner: unique identifier
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* @next_fence: fence to be used with next send command
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*/
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struct intel_guc_ct_channel {
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struct i915_vma *vma;
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struct intel_guc_ct_buffer ctbs[2];
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u32 owner;
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u32 next_fence;
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bool enabled;
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};
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/** Holds all command transport channels.
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*
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* @host_channel: main channel used by the host
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*/
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struct intel_guc_ct {
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struct intel_guc_ct_channel host_channel;
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/* other channels are tbd */
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/** @lock: protects pending requests list */
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spinlock_t lock;
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/** @pending_requests: list of requests waiting for response */
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struct list_head pending_requests;
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/** @incoming_requests: list of incoming requests */
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struct list_head incoming_requests;
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/** @worker: worker for handling incoming requests */
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struct work_struct worker;
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};
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void intel_guc_ct_init_early(struct intel_guc_ct *ct);
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int intel_guc_ct_init(struct intel_guc_ct *ct);
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void intel_guc_ct_fini(struct intel_guc_ct *ct);
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int intel_guc_ct_enable(struct intel_guc_ct *ct);
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void intel_guc_ct_disable(struct intel_guc_ct *ct);
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static inline void intel_guc_ct_stop(struct intel_guc_ct *ct)
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{
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ct->host_channel.enabled = false;
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}
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int intel_guc_send_ct(struct intel_guc *guc, const u32 *action, u32 len,
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u32 *response_buf, u32 response_buf_size);
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void intel_guc_to_host_event_handler_ct(struct intel_guc *guc);
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#endif /* _INTEL_GUC_CT_H_ */
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