linux_dsm_epyc7002/drivers/clk/sunxi
Stephen Boyd 38320181c7 Allwinner clock changes for 4.10
The usual patches from us, but most notably the introduction of the A64
 clocks unit.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYK30lAAoJEBx+YmzsjxAgNqMP/A0eKZkzCWP8QXePS5OVTzjn
 Afnp85tpYGNrR5OTwJiM32IDAAU6mvb4813Z0MwQ5Wp+TM3APpiRzwnF3yjxeoGu
 Jgzsu+NLgPtp/CozaGC46IlacGRR0amyLhryq8cVOaEKTed4b0t2Xjmk4JsRj7Gp
 2ki5HVs4QSN63p4GixxhxVXgtYNoOBvm3qCgMbWa10j5DIDA2Wf//feudTeu98xa
 gR9uz08xBVHXtIlyjXfY72l/qcjmcRZDdAXPTItZWR4MREuLMh3jlwM2oxMn1nKY
 PLu7KfPail1ATv+6Pa5EJcAqvxCnW8mH8F0Tk/xqd/ZGuEwHW5rRPVl5NLO81iBe
 K4Pfh8DrEtMBhS2C5nY3qOYQP6XcE4d2OSN8zNCM50ATdXMx+6gX1Dep6cz6waKj
 Uo/v6GdkMhKgd1lBcH2CGJrWN7HQWb4wM/gctIa7T5uIQp/WBWEXACpOmRsD+4yt
 c83qtys3FTO5Iuj1UVETHm8tAIC58xvQ+ZYs3Z7wusMJVRMH2KMi7MiNXF0zBHDL
 cG/cQa9MrhIOJgd04TC8EDye/+Wn1rLFhMZWnbgcThpdKmd+MSPO/3ZeNKkCFJAh
 F3CD+5oeQA9mctJBirpsPCrGnKwtkEZycB7jymkEPptvad+TLfGHdkwE0U2FhaxE
 qN094vyPeAgceu9u9NyZ
 =7+Az
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock changes from Maxime Ripard:

The usual patches from us, but most notably the introduction of the A64
clocks unit.

* tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: Add A64 clocks
  clk: sunxi-ng: Implement minimum for multipliers
  clk: sunxi-ng: Add minimums for all the relevant structures and clocks
  clk: sunxi-ng: Finish to convert to structures for arguments
  clk: sunxi-ng: Remove the use of rational computations
  clk: sunxi-ng: Rename the internal structures
  clk: sunxi: mod0: improve function-level documentation
2016-11-16 11:19:20 -08:00
..
clk-a10-codec.c clk: sunxi: codec clock support 2015-10-21 21:51:28 +02:00
clk-a10-hosc.c clk: sunxi: Remove CLK_IS_ROOT 2016-04-15 16:50:05 -07:00
clk-a10-mod1.c clk: sunxi: mod1 clock should modify it's parent 2016-04-22 00:29:21 +02:00
clk-a10-pll2.c clk: sunxi: pll2: Fix return value check in sun4i_pll2_setup() 2016-08-08 19:27:33 +02:00
clk-a10-ve.c clk: sunxi: Make reset_control_ops const 2016-03-29 16:30:07 -07:00
clk-a20-gmac.c clk: sunxi: Remove clk_register_clkdev calls 2016-02-11 20:05:47 +01:00
clk-factors.c clk: sunxi: make clk-* explicitly non-modular 2016-07-06 15:20:34 -07:00
clk-factors.h clk: sunxi: Remove clk_register_clkdev calls 2016-02-11 20:05:47 +01:00
clk-mod0.c clk: sunxi: mod0: improve function-level documentation 2016-10-16 14:31:13 +02:00
clk-simple-gates.c clk: sunxi: Add apb0 gates for H3 2016-02-25 11:30:32 -08:00
clk-sun4i-display.c clk: sunxi: display: Add per-clock flags 2016-06-10 11:49:47 +02:00
clk-sun4i-pll3.c clk: sunxi: Add PLL3 clock 2016-04-22 00:29:23 +02:00
clk-sun4i-tcon-ch1.c clk: sunxi: remove unused variable 2016-06-16 09:18:29 +02:00
clk-sun6i-apb0-gates.c clk: sunxi: make clk-* explicitly non-modular 2016-07-06 15:20:34 -07:00
clk-sun6i-apb0.c clk: sunxi: make clk-* explicitly non-modular 2016-07-06 15:20:34 -07:00
clk-sun6i-ar100.c clk: sunxi: make clk-* explicitly non-modular 2016-07-06 15:20:34 -07:00
clk-sun8i-apb0.c clk: sunxi: apb0: Use new macro CLK_OF_DECLARE_DRIVER 2016-08-12 18:01:50 -07:00
clk-sun8i-bus-gates.c clk: sunxi: add bus gates for A83T 2016-02-02 14:14:24 +01:00
clk-sun8i-mbus.c clk: sunxi: Fix return value check in sun8i_a23_mbus_setup() 2016-08-08 19:27:33 +02:00
clk-sun9i-core.c clk: sunxi: Remove clk_register_clkdev calls 2016-02-11 20:05:47 +01:00
clk-sun9i-cpus.c clk: sunxi: Add sun9i A80 cpus (cpu special) clock support 2015-12-01 14:06:47 +01:00
clk-sun9i-mmc.c clk: sunxi: make clk-* explicitly non-modular 2016-07-06 15:20:34 -07:00
clk-sunxi.c clk: sunxi: Fix M factor computation for APB1 2016-11-04 08:49:46 +01:00
clk-usb.c clk: sunxi: Make reset_control_ops const 2016-03-29 16:30:07 -07:00
Makefile clk: sunxi: Add display and TCON0 clocks driver 2016-05-12 14:47:52 -07:00