mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 03:55:20 +07:00
e59347a1d1
The core interrupt chip is a straight forward conversion. The gpio chip is implemented with two instances of the irq_chip_type which can be switched with the irq_set_type function. That allows us to use the generic callbacks and avoids the conditionals in them. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
35 lines
905 B
C
35 lines
905 B
C
/*
|
|
* arch/arm/plat-orion/irq.c
|
|
*
|
|
* Marvell Orion SoC IRQ handling.
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/init.h>
|
|
#include <linux/irq.h>
|
|
#include <linux/io.h>
|
|
#include <plat/irq.h>
|
|
|
|
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
|
|
{
|
|
struct irq_chip_generic *gc;
|
|
struct irq_chip_type *ct;
|
|
|
|
/*
|
|
* Mask all interrupts initially.
|
|
*/
|
|
writel(0, maskaddr);
|
|
|
|
gc = irq_alloc_generic_chip("orion_irq", 1, irq_start, maskaddr,
|
|
handle_level_irq);
|
|
ct = gc->chip_types;
|
|
ct->chip.irq_mask = irq_gc_mask_clr_bit;
|
|
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
|
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
|
|
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
|
}
|