mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
dd67cab5db
The most innocuous result of not having done this is that we end up sending unnecessary methods when we next enable the window. However, interactions with the code handling skipping disables when an update immediately follows, and window ownership assignment, can lead to upsetting the display hardware on Volta and newer. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
774 lines
21 KiB
C
774 lines
21 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "wndw.h"
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#include "wimm.h"
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#include <nvif/class.h>
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#include <nvif/cl0002.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_fourcc.h>
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#include "nouveau_bo.h"
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#include "nouveau_gem.h"
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static void
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nv50_wndw_ctxdma_del(struct nv50_wndw_ctxdma *ctxdma)
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{
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nvif_object_fini(&ctxdma->object);
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list_del(&ctxdma->head);
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kfree(ctxdma);
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}
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static struct nv50_wndw_ctxdma *
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nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct drm_framebuffer *fb)
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{
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struct nouveau_drm *drm = nouveau_drm(fb->dev);
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struct nv50_wndw_ctxdma *ctxdma;
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u32 handle;
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u32 unused;
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u8 kind;
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struct {
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struct nv_dma_v0 base;
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union {
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struct nv50_dma_v0 nv50;
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struct gf100_dma_v0 gf100;
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struct gf119_dma_v0 gf119;
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};
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} args = {};
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u32 argc = sizeof(args.base);
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int ret;
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nouveau_framebuffer_get_layout(fb, &unused, &kind);
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handle = 0xfb000000 | kind;
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list_for_each_entry(ctxdma, &wndw->ctxdma.list, head) {
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if (ctxdma->object.handle == handle)
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return ctxdma;
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}
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if (!(ctxdma = kzalloc(sizeof(*ctxdma), GFP_KERNEL)))
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return ERR_PTR(-ENOMEM);
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list_add(&ctxdma->head, &wndw->ctxdma.list);
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args.base.target = NV_DMA_V0_TARGET_VRAM;
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args.base.access = NV_DMA_V0_ACCESS_RDWR;
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args.base.start = 0;
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args.base.limit = drm->client.device.info.ram_user - 1;
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if (drm->client.device.info.chipset < 0x80) {
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args.nv50.part = NV50_DMA_V0_PART_256;
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argc += sizeof(args.nv50);
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} else
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if (drm->client.device.info.chipset < 0xc0) {
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args.nv50.part = NV50_DMA_V0_PART_256;
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args.nv50.kind = kind;
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argc += sizeof(args.nv50);
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} else
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if (drm->client.device.info.chipset < 0xd0) {
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args.gf100.kind = kind;
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argc += sizeof(args.gf100);
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} else {
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args.gf119.page = GF119_DMA_V0_PAGE_LP;
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args.gf119.kind = kind;
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argc += sizeof(args.gf119);
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}
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ret = nvif_object_init(wndw->ctxdma.parent, handle, NV_DMA_IN_MEMORY,
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&args, argc, &ctxdma->object);
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if (ret) {
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nv50_wndw_ctxdma_del(ctxdma);
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return ERR_PTR(ret);
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}
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return ctxdma;
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}
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int
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nv50_wndw_wait_armed(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
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if (asyw->set.ntfy) {
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return wndw->func->ntfy_wait_begun(disp->sync,
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asyw->ntfy.offset,
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wndw->wndw.base.device);
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}
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return 0;
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}
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void
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nv50_wndw_flush_clr(struct nv50_wndw *wndw, u32 *interlock, bool flush,
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struct nv50_wndw_atom *asyw)
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{
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union nv50_wndw_atom_mask clr = {
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.mask = asyw->clr.mask & ~(flush ? 0 : asyw->set.mask),
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};
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if (clr.sema ) wndw->func-> sema_clr(wndw);
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if (clr.ntfy ) wndw->func-> ntfy_clr(wndw);
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if (clr.xlut ) wndw->func-> xlut_clr(wndw);
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if (clr.csc ) wndw->func-> csc_clr(wndw);
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if (clr.image) wndw->func->image_clr(wndw);
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interlock[wndw->interlock.type] |= wndw->interlock.data;
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}
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void
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nv50_wndw_flush_set(struct nv50_wndw *wndw, u32 *interlock,
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struct nv50_wndw_atom *asyw)
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{
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if (interlock[NV50_DISP_INTERLOCK_CORE]) {
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asyw->image.mode = 0;
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asyw->image.interval = 1;
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}
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if (asyw->set.sema ) wndw->func->sema_set (wndw, asyw);
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if (asyw->set.ntfy ) wndw->func->ntfy_set (wndw, asyw);
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if (asyw->set.image) wndw->func->image_set(wndw, asyw);
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if (asyw->set.xlut ) {
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if (asyw->ilut) {
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asyw->xlut.i.offset =
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nv50_lut_load(&wndw->ilut, asyw->xlut.i.buffer,
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asyw->ilut, asyw->xlut.i.load);
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}
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wndw->func->xlut_set(wndw, asyw);
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}
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if (asyw->set.csc ) wndw->func->csc_set (wndw, asyw);
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if (asyw->set.scale) wndw->func->scale_set(wndw, asyw);
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if (asyw->set.blend) wndw->func->blend_set(wndw, asyw);
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if (asyw->set.point) {
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if (asyw->set.point = false, asyw->set.mask)
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interlock[wndw->interlock.type] |= wndw->interlock.data;
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interlock[NV50_DISP_INTERLOCK_WIMM] |= wndw->interlock.wimm;
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wndw->immd->point(wndw, asyw);
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wndw->immd->update(wndw, interlock);
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} else {
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interlock[wndw->interlock.type] |= wndw->interlock.data;
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}
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}
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void
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nv50_wndw_ntfy_enable(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nv50_disp *disp = nv50_disp(wndw->plane.dev);
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asyw->ntfy.handle = wndw->wndw.sync.handle;
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asyw->ntfy.offset = wndw->ntfy;
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asyw->ntfy.awaken = false;
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asyw->set.ntfy = true;
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wndw->func->ntfy_reset(disp->sync, wndw->ntfy);
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wndw->ntfy ^= 0x10;
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}
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static void
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nv50_wndw_atomic_check_release(struct nv50_wndw *wndw,
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struct nv50_wndw_atom *asyw,
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struct nv50_head_atom *asyh)
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{
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struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
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NV_ATOMIC(drm, "%s release\n", wndw->plane.name);
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wndw->func->release(wndw, asyw, asyh);
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asyw->ntfy.handle = 0;
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asyw->sema.handle = 0;
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asyw->xlut.handle = 0;
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memset(asyw->image.handle, 0x00, sizeof(asyw->image.handle));
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}
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static int
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nv50_wndw_atomic_check_acquire_yuv(struct nv50_wndw_atom *asyw)
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{
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switch (asyw->state.fb->format->format) {
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case DRM_FORMAT_YUYV: asyw->image.format = 0x28; break;
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case DRM_FORMAT_UYVY: asyw->image.format = 0x29; break;
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default:
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WARN_ON(1);
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return -EINVAL;
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}
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asyw->image.colorspace = 1;
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return 0;
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}
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static int
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nv50_wndw_atomic_check_acquire_rgb(struct nv50_wndw_atom *asyw)
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{
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switch (asyw->state.fb->format->format) {
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case DRM_FORMAT_C8 : asyw->image.format = 0x1e; break;
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case DRM_FORMAT_XRGB8888 :
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case DRM_FORMAT_ARGB8888 : asyw->image.format = 0xcf; break;
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case DRM_FORMAT_RGB565 : asyw->image.format = 0xe8; break;
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case DRM_FORMAT_XRGB1555 :
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case DRM_FORMAT_ARGB1555 : asyw->image.format = 0xe9; break;
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case DRM_FORMAT_XBGR2101010 :
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case DRM_FORMAT_ABGR2101010 : asyw->image.format = 0xd1; break;
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case DRM_FORMAT_XBGR8888 :
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case DRM_FORMAT_ABGR8888 : asyw->image.format = 0xd5; break;
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case DRM_FORMAT_XRGB2101010 :
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case DRM_FORMAT_ARGB2101010 : asyw->image.format = 0xdf; break;
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case DRM_FORMAT_XBGR16161616F:
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case DRM_FORMAT_ABGR16161616F: asyw->image.format = 0xca; break;
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default:
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return -EINVAL;
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}
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asyw->image.colorspace = 0;
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return 0;
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}
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static int
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nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
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struct nv50_wndw_atom *armw,
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struct nv50_wndw_atom *asyw,
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struct nv50_head_atom *asyh)
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{
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struct drm_framebuffer *fb = asyw->state.fb;
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struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
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uint8_t kind;
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uint32_t tile_mode;
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int ret;
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NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name);
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if (fb != armw->state.fb || !armw->visible || modeset) {
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nouveau_framebuffer_get_layout(fb, &tile_mode, &kind);
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asyw->image.w = fb->width;
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asyw->image.h = fb->height;
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asyw->image.kind = kind;
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ret = nv50_wndw_atomic_check_acquire_rgb(asyw);
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if (ret) {
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ret = nv50_wndw_atomic_check_acquire_yuv(asyw);
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if (ret)
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return ret;
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}
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if (asyw->image.kind) {
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asyw->image.layout = 0;
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if (drm->client.device.info.chipset >= 0xc0)
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asyw->image.blockh = tile_mode >> 4;
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else
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asyw->image.blockh = tile_mode;
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asyw->image.blocks[0] = fb->pitches[0] / 64;
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asyw->image.pitch[0] = 0;
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} else {
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asyw->image.layout = 1;
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asyw->image.blockh = 0;
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asyw->image.blocks[0] = 0;
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asyw->image.pitch[0] = fb->pitches[0];
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}
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if (!asyh->state.async_flip)
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asyw->image.interval = 1;
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else
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asyw->image.interval = 0;
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asyw->image.mode = asyw->image.interval ? 0 : 1;
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asyw->set.image = wndw->func->image_set != NULL;
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}
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if (wndw->func->scale_set) {
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asyw->scale.sx = asyw->state.src_x >> 16;
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asyw->scale.sy = asyw->state.src_y >> 16;
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asyw->scale.sw = asyw->state.src_w >> 16;
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asyw->scale.sh = asyw->state.src_h >> 16;
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asyw->scale.dw = asyw->state.crtc_w;
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asyw->scale.dh = asyw->state.crtc_h;
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if (memcmp(&armw->scale, &asyw->scale, sizeof(asyw->scale)))
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asyw->set.scale = true;
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}
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if (wndw->func->blend_set) {
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asyw->blend.depth = 255 - asyw->state.normalized_zpos;
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asyw->blend.k1 = asyw->state.alpha >> 8;
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switch (asyw->state.pixel_blend_mode) {
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case DRM_MODE_BLEND_PREMULTI:
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asyw->blend.src_color = 2; /* K1 */
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asyw->blend.dst_color = 7; /* NEG_K1_TIMES_SRC */
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break;
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case DRM_MODE_BLEND_COVERAGE:
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asyw->blend.src_color = 5; /* K1_TIMES_SRC */
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asyw->blend.dst_color = 7; /* NEG_K1_TIMES_SRC */
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break;
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case DRM_MODE_BLEND_PIXEL_NONE:
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default:
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asyw->blend.src_color = 2; /* K1 */
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asyw->blend.dst_color = 4; /* NEG_K1 */
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break;
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}
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if (memcmp(&armw->blend, &asyw->blend, sizeof(asyw->blend)))
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asyw->set.blend = true;
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}
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if (wndw->immd) {
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asyw->point.x = asyw->state.crtc_x;
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asyw->point.y = asyw->state.crtc_y;
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if (memcmp(&armw->point, &asyw->point, sizeof(asyw->point)))
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asyw->set.point = true;
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}
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return wndw->func->acquire(wndw, asyw, asyh);
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}
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static int
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nv50_wndw_atomic_check_lut(struct nv50_wndw *wndw,
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struct nv50_wndw_atom *armw,
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struct nv50_wndw_atom *asyw,
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struct nv50_head_atom *asyh)
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{
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struct drm_property_blob *ilut = asyh->state.degamma_lut;
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/* I8 format without an input LUT makes no sense, and the
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* HW error-checks for this.
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*
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* In order to handle legacy gamma, when there's no input
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* LUT we need to steal the output LUT and use it instead.
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*/
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if (!ilut && asyw->state.fb->format->format == DRM_FORMAT_C8) {
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/* This should be an error, but there's legacy clients
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* that do a modeset before providing a gamma table.
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*
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* We keep the window disabled to avoid angering HW.
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*/
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if (!(ilut = asyh->state.gamma_lut)) {
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asyw->visible = false;
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return 0;
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}
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if (wndw->func->ilut)
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asyh->wndw.olut |= BIT(wndw->id);
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} else {
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asyh->wndw.olut &= ~BIT(wndw->id);
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}
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if (!ilut && wndw->func->ilut_identity &&
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asyw->state.fb->format->format != DRM_FORMAT_XBGR16161616F &&
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asyw->state.fb->format->format != DRM_FORMAT_ABGR16161616F) {
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static struct drm_property_blob dummy = {};
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ilut = &dummy;
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}
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/* Recalculate LUT state. */
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memset(&asyw->xlut, 0x00, sizeof(asyw->xlut));
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if ((asyw->ilut = wndw->func->ilut ? ilut : NULL)) {
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if (!wndw->func->ilut(wndw, asyw, drm_color_lut_size(ilut))) {
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DRM_DEBUG_KMS("Invalid ilut\n");
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return -EINVAL;
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}
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asyw->xlut.handle = wndw->wndw.vram.handle;
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asyw->xlut.i.buffer = !asyw->xlut.i.buffer;
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asyw->set.xlut = true;
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} else {
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asyw->clr.xlut = armw->xlut.handle != 0;
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}
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/* Handle setting base SET_OUTPUT_LUT_LO_ENABLE_USE_CORE_LUT. */
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if (wndw->func->olut_core &&
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(!armw->visible || (armw->xlut.handle && !asyw->xlut.handle)))
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asyw->set.xlut = true;
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if (wndw->func->csc && asyh->state.ctm) {
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const struct drm_color_ctm *ctm = asyh->state.ctm->data;
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wndw->func->csc(wndw, asyw, ctm);
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asyw->csc.valid = true;
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asyw->set.csc = true;
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} else {
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asyw->csc.valid = false;
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asyw->clr.csc = armw->csc.valid;
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}
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/* Can't do an immediate flip while changing the LUT. */
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asyh->state.async_flip = false;
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return 0;
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}
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static int
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nv50_wndw_atomic_check(struct drm_plane *plane, struct drm_plane_state *state)
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{
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struct nouveau_drm *drm = nouveau_drm(plane->dev);
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struct nv50_wndw *wndw = nv50_wndw(plane);
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struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state);
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struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
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struct nv50_head_atom *harm = NULL, *asyh = NULL;
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bool modeset = false;
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int ret;
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NV_ATOMIC(drm, "%s atomic_check\n", plane->name);
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/* Fetch the assembly state for the head the window will belong to,
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* and determine whether the window will be visible.
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*/
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if (asyw->state.crtc) {
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asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
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if (IS_ERR(asyh))
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return PTR_ERR(asyh);
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modeset = drm_atomic_crtc_needs_modeset(&asyh->state);
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asyw->visible = asyh->state.active;
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} else {
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asyw->visible = false;
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}
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/* Fetch assembly state for the head the window used to belong to. */
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if (armw->state.crtc) {
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harm = nv50_head_atom_get(asyw->state.state, armw->state.crtc);
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if (IS_ERR(harm))
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return PTR_ERR(harm);
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}
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/* LUT configuration can potentially cause the window to be disabled. */
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if (asyw->visible && wndw->func->xlut_set &&
|
|
(!armw->visible ||
|
|
asyh->state.color_mgmt_changed ||
|
|
asyw->state.fb->format->format !=
|
|
armw->state.fb->format->format)) {
|
|
ret = nv50_wndw_atomic_check_lut(wndw, armw, asyw, asyh);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/* Calculate new window state. */
|
|
if (asyw->visible) {
|
|
ret = nv50_wndw_atomic_check_acquire(wndw, modeset,
|
|
armw, asyw, asyh);
|
|
if (ret)
|
|
return ret;
|
|
|
|
asyh->wndw.mask |= BIT(wndw->id);
|
|
} else
|
|
if (armw->visible) {
|
|
nv50_wndw_atomic_check_release(wndw, asyw, harm);
|
|
harm->wndw.mask &= ~BIT(wndw->id);
|
|
} else {
|
|
return 0;
|
|
}
|
|
|
|
/* Aside from the obvious case where the window is actively being
|
|
* disabled, we might also need to temporarily disable the window
|
|
* when performing certain modeset operations.
|
|
*/
|
|
if (!asyw->visible || modeset) {
|
|
asyw->clr.ntfy = armw->ntfy.handle != 0;
|
|
asyw->clr.sema = armw->sema.handle != 0;
|
|
asyw->clr.xlut = armw->xlut.handle != 0;
|
|
if (asyw->clr.xlut && asyw->visible)
|
|
asyw->set.xlut = asyw->xlut.handle != 0;
|
|
asyw->clr.csc = armw->csc.valid;
|
|
if (wndw->func->image_clr)
|
|
asyw->clr.image = armw->image.handle[0] != 0;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
nv50_wndw_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_drm(plane->dev);
|
|
struct nouveau_bo *nvbo;
|
|
|
|
NV_ATOMIC(drm, "%s cleanup: %p\n", plane->name, old_state->fb);
|
|
if (!old_state->fb)
|
|
return;
|
|
|
|
nvbo = nouveau_gem_object(old_state->fb->obj[0]);
|
|
nouveau_bo_unpin(nvbo);
|
|
}
|
|
|
|
static int
|
|
nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
|
|
{
|
|
struct drm_framebuffer *fb = state->fb;
|
|
struct nouveau_drm *drm = nouveau_drm(plane->dev);
|
|
struct nv50_wndw *wndw = nv50_wndw(plane);
|
|
struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
|
|
struct nouveau_bo *nvbo;
|
|
struct nv50_head_atom *asyh;
|
|
struct nv50_wndw_ctxdma *ctxdma;
|
|
int ret;
|
|
|
|
NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, fb);
|
|
if (!asyw->state.fb)
|
|
return 0;
|
|
|
|
nvbo = nouveau_gem_object(fb->obj[0]);
|
|
ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM, true);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (wndw->ctxdma.parent) {
|
|
ctxdma = nv50_wndw_ctxdma_new(wndw, fb);
|
|
if (IS_ERR(ctxdma)) {
|
|
nouveau_bo_unpin(nvbo);
|
|
return PTR_ERR(ctxdma);
|
|
}
|
|
|
|
if (asyw->visible)
|
|
asyw->image.handle[0] = ctxdma->object.handle;
|
|
}
|
|
|
|
asyw->state.fence = dma_resv_get_excl_rcu(nvbo->bo.base.resv);
|
|
asyw->image.offset[0] = nvbo->bo.offset;
|
|
|
|
if (wndw->func->prepare) {
|
|
asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc);
|
|
if (IS_ERR(asyh))
|
|
return PTR_ERR(asyh);
|
|
|
|
wndw->func->prepare(wndw, asyh, asyw);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct drm_plane_helper_funcs
|
|
nv50_wndw_helper = {
|
|
.prepare_fb = nv50_wndw_prepare_fb,
|
|
.cleanup_fb = nv50_wndw_cleanup_fb,
|
|
.atomic_check = nv50_wndw_atomic_check,
|
|
};
|
|
|
|
static void
|
|
nv50_wndw_atomic_destroy_state(struct drm_plane *plane,
|
|
struct drm_plane_state *state)
|
|
{
|
|
struct nv50_wndw_atom *asyw = nv50_wndw_atom(state);
|
|
__drm_atomic_helper_plane_destroy_state(&asyw->state);
|
|
kfree(asyw);
|
|
}
|
|
|
|
static struct drm_plane_state *
|
|
nv50_wndw_atomic_duplicate_state(struct drm_plane *plane)
|
|
{
|
|
struct nv50_wndw_atom *armw = nv50_wndw_atom(plane->state);
|
|
struct nv50_wndw_atom *asyw;
|
|
if (!(asyw = kmalloc(sizeof(*asyw), GFP_KERNEL)))
|
|
return NULL;
|
|
__drm_atomic_helper_plane_duplicate_state(plane, &asyw->state);
|
|
asyw->sema = armw->sema;
|
|
asyw->ntfy = armw->ntfy;
|
|
asyw->ilut = NULL;
|
|
asyw->xlut = armw->xlut;
|
|
asyw->csc = armw->csc;
|
|
asyw->image = armw->image;
|
|
asyw->point = armw->point;
|
|
asyw->clr.mask = 0;
|
|
asyw->set.mask = 0;
|
|
return &asyw->state;
|
|
}
|
|
|
|
static int
|
|
nv50_wndw_zpos_default(struct drm_plane *plane)
|
|
{
|
|
return (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 :
|
|
(plane->type == DRM_PLANE_TYPE_OVERLAY) ? 1 : 255;
|
|
}
|
|
|
|
static void
|
|
nv50_wndw_reset(struct drm_plane *plane)
|
|
{
|
|
struct nv50_wndw_atom *asyw;
|
|
|
|
if (WARN_ON(!(asyw = kzalloc(sizeof(*asyw), GFP_KERNEL))))
|
|
return;
|
|
|
|
if (plane->state)
|
|
plane->funcs->atomic_destroy_state(plane, plane->state);
|
|
|
|
__drm_atomic_helper_plane_reset(plane, &asyw->state);
|
|
plane->state->zpos = nv50_wndw_zpos_default(plane);
|
|
plane->state->normalized_zpos = nv50_wndw_zpos_default(plane);
|
|
}
|
|
|
|
static void
|
|
nv50_wndw_destroy(struct drm_plane *plane)
|
|
{
|
|
struct nv50_wndw *wndw = nv50_wndw(plane);
|
|
struct nv50_wndw_ctxdma *ctxdma, *ctxtmp;
|
|
|
|
list_for_each_entry_safe(ctxdma, ctxtmp, &wndw->ctxdma.list, head) {
|
|
nv50_wndw_ctxdma_del(ctxdma);
|
|
}
|
|
|
|
nvif_notify_fini(&wndw->notify);
|
|
nv50_dmac_destroy(&wndw->wimm);
|
|
nv50_dmac_destroy(&wndw->wndw);
|
|
|
|
nv50_lut_fini(&wndw->ilut);
|
|
|
|
drm_plane_cleanup(&wndw->plane);
|
|
kfree(wndw);
|
|
}
|
|
|
|
/* This function assumes the format has already been validated against the plane
|
|
* and the modifier was validated against the device-wides modifier list at FB
|
|
* creation time.
|
|
*/
|
|
static bool nv50_plane_format_mod_supported(struct drm_plane *plane,
|
|
u32 format, u64 modifier)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_drm(plane->dev);
|
|
uint8_t i;
|
|
|
|
if (drm->client.device.info.chipset < 0xc0) {
|
|
const struct drm_format_info *info = drm_format_info(format);
|
|
const uint8_t kind = (modifier >> 12) & 0xff;
|
|
|
|
if (!format) return false;
|
|
|
|
for (i = 0; i < info->num_planes; i++)
|
|
if ((info->cpp[i] != 4) && kind != 0x70) return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
const struct drm_plane_funcs
|
|
nv50_wndw = {
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
|
.destroy = nv50_wndw_destroy,
|
|
.reset = nv50_wndw_reset,
|
|
.atomic_duplicate_state = nv50_wndw_atomic_duplicate_state,
|
|
.atomic_destroy_state = nv50_wndw_atomic_destroy_state,
|
|
.format_mod_supported = nv50_plane_format_mod_supported,
|
|
};
|
|
|
|
static int
|
|
nv50_wndw_notify(struct nvif_notify *notify)
|
|
{
|
|
return NVIF_NOTIFY_KEEP;
|
|
}
|
|
|
|
void
|
|
nv50_wndw_fini(struct nv50_wndw *wndw)
|
|
{
|
|
nvif_notify_put(&wndw->notify);
|
|
}
|
|
|
|
void
|
|
nv50_wndw_init(struct nv50_wndw *wndw)
|
|
{
|
|
nvif_notify_get(&wndw->notify);
|
|
}
|
|
|
|
int
|
|
nv50_wndw_new_(const struct nv50_wndw_func *func, struct drm_device *dev,
|
|
enum drm_plane_type type, const char *name, int index,
|
|
const u32 *format, u32 heads,
|
|
enum nv50_disp_interlock_type interlock_type, u32 interlock_data,
|
|
struct nv50_wndw **pwndw)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_drm(dev);
|
|
struct nvif_mmu *mmu = &drm->client.mmu;
|
|
struct nv50_disp *disp = nv50_disp(dev);
|
|
struct nv50_wndw *wndw;
|
|
int nformat;
|
|
int ret;
|
|
|
|
if (!(wndw = *pwndw = kzalloc(sizeof(*wndw), GFP_KERNEL)))
|
|
return -ENOMEM;
|
|
wndw->func = func;
|
|
wndw->id = index;
|
|
wndw->interlock.type = interlock_type;
|
|
wndw->interlock.data = interlock_data;
|
|
|
|
wndw->ctxdma.parent = &wndw->wndw.base.user;
|
|
INIT_LIST_HEAD(&wndw->ctxdma.list);
|
|
|
|
for (nformat = 0; format[nformat]; nformat++);
|
|
|
|
ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw,
|
|
format, nformat,
|
|
nouveau_display(dev)->format_modifiers,
|
|
type, "%s-%d", name, index);
|
|
if (ret) {
|
|
kfree(*pwndw);
|
|
*pwndw = NULL;
|
|
return ret;
|
|
}
|
|
|
|
drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper);
|
|
|
|
if (wndw->func->ilut) {
|
|
ret = nv50_lut_init(disp, mmu, &wndw->ilut);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
wndw->notify.func = nv50_wndw_notify;
|
|
|
|
if (wndw->func->blend_set) {
|
|
ret = drm_plane_create_zpos_property(&wndw->plane,
|
|
nv50_wndw_zpos_default(&wndw->plane), 0, 254);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = drm_plane_create_alpha_property(&wndw->plane);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = drm_plane_create_blend_mode_property(&wndw->plane,
|
|
BIT(DRM_MODE_BLEND_PIXEL_NONE) |
|
|
BIT(DRM_MODE_BLEND_PREMULTI) |
|
|
BIT(DRM_MODE_BLEND_COVERAGE));
|
|
if (ret)
|
|
return ret;
|
|
} else {
|
|
ret = drm_plane_create_zpos_immutable_property(&wndw->plane,
|
|
nv50_wndw_zpos_default(&wndw->plane));
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
nv50_wndw_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
|
|
struct nv50_wndw **pwndw)
|
|
{
|
|
struct {
|
|
s32 oclass;
|
|
int version;
|
|
int (*new)(struct nouveau_drm *, enum drm_plane_type,
|
|
int, s32, struct nv50_wndw **);
|
|
} wndws[] = {
|
|
{ TU102_DISP_WINDOW_CHANNEL_DMA, 0, wndwc57e_new },
|
|
{ GV100_DISP_WINDOW_CHANNEL_DMA, 0, wndwc37e_new },
|
|
{}
|
|
};
|
|
struct nv50_disp *disp = nv50_disp(drm->dev);
|
|
int cid, ret;
|
|
|
|
cid = nvif_mclass(&disp->disp->object, wndws);
|
|
if (cid < 0) {
|
|
NV_ERROR(drm, "No supported window class\n");
|
|
return cid;
|
|
}
|
|
|
|
ret = wndws[cid].new(drm, type, index, wndws[cid].oclass, pwndw);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return nv50_wimm_init(drm, *pwndw);
|
|
}
|