mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
4a2cb4181b
Right now, we make the mistake of allowing interlacing on all connectors. Nvidia hardware does not always support interlacing with DP though, so we need to make sure that we don't allow interlaced modes to be set in such situations as otherwise we'll end up accidentally hanging the display HW. This fixes some hangs with Turing, which would be caused by attempting to set an interlaced mode on hardware that doesn't support it. This patch likely fixes other hardware hanging in the same way as well. Note that we say we probe PIOR caps, but they don't actually have any interlacing caps. So, the get_caps() function for PIORs just sets interlacing support to true. Changes since v1: * Actually probe caps correctly this time, both on EVO and NVDisplay. Changes since v2: * Fix probing for < GF119 * Use vfunc table, in prep for adding more caps in the future. Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
100 lines
2.8 KiB
C
100 lines
2.8 KiB
C
#ifndef __NV50_KMS_H__
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#define __NV50_KMS_H__
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#include <nvif/mem.h>
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#include "nouveau_display.h"
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struct nv50_msto;
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struct nv50_disp {
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struct nvif_disp *disp;
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struct nv50_core *core;
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struct nvif_object caps;
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#define NV50_DISP_SYNC(c, o) ((c) * 0x040 + (o))
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#define NV50_DISP_CORE_NTFY NV50_DISP_SYNC(0 , 0x00)
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#define NV50_DISP_WNDW_SEM0(c) NV50_DISP_SYNC(1 + (c), 0x00)
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#define NV50_DISP_WNDW_SEM1(c) NV50_DISP_SYNC(1 + (c), 0x10)
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#define NV50_DISP_WNDW_NTFY(c) NV50_DISP_SYNC(1 + (c), 0x20)
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#define NV50_DISP_BASE_SEM0(c) NV50_DISP_WNDW_SEM0(0 + (c))
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#define NV50_DISP_BASE_SEM1(c) NV50_DISP_WNDW_SEM1(0 + (c))
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#define NV50_DISP_BASE_NTFY(c) NV50_DISP_WNDW_NTFY(0 + (c))
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#define NV50_DISP_OVLY_SEM0(c) NV50_DISP_WNDW_SEM0(4 + (c))
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#define NV50_DISP_OVLY_SEM1(c) NV50_DISP_WNDW_SEM1(4 + (c))
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#define NV50_DISP_OVLY_NTFY(c) NV50_DISP_WNDW_NTFY(4 + (c))
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struct nouveau_bo *sync;
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struct mutex mutex;
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};
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static inline struct nv50_disp *
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nv50_disp(struct drm_device *dev)
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{
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return nouveau_display(dev)->priv;
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}
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struct nv50_disp_interlock {
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enum nv50_disp_interlock_type {
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NV50_DISP_INTERLOCK_CORE = 0,
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NV50_DISP_INTERLOCK_CURS,
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NV50_DISP_INTERLOCK_BASE,
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NV50_DISP_INTERLOCK_OVLY,
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NV50_DISP_INTERLOCK_WNDW,
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NV50_DISP_INTERLOCK_WIMM,
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NV50_DISP_INTERLOCK__SIZE
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} type;
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u32 data;
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u32 wimm;
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};
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void corec37d_ntfy_init(struct nouveau_bo *, u32);
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void head907d_olut_load(struct drm_color_lut *, int size, void __iomem *);
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struct nv50_chan {
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struct nvif_object user;
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struct nvif_device *device;
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};
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struct nv50_dmac {
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struct nv50_chan base;
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struct nvif_mem push;
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u32 *ptr;
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struct nvif_object sync;
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struct nvif_object vram;
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/* Protects against concurrent pushbuf access to this channel, lock is
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* grabbed by evo_wait (if the pushbuf reservation is successful) and
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* dropped again by evo_kick. */
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struct mutex lock;
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};
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int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
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const s32 *oclass, u8 head, void *data, u32 size,
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u64 syncbuf, struct nv50_dmac *dmac);
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void nv50_dmac_destroy(struct nv50_dmac *);
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u32 *evo_wait(struct nv50_dmac *, int nr);
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void evo_kick(u32 *, struct nv50_dmac *);
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extern const u64 disp50xx_modifiers[];
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extern const u64 disp90xx_modifiers[];
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extern const u64 wndwc57e_modifiers[];
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#define evo_mthd(p, m, s) do { \
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const u32 _m = (m), _s = (s); \
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if (drm_debug_enabled(DRM_UT_KMS)) \
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pr_err("%04x %d %s\n", _m, _s, __func__); \
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*((p)++) = ((_s << 18) | _m); \
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} while(0)
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#define evo_data(p, d) do { \
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const u32 _d = (d); \
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if (drm_debug_enabled(DRM_UT_KMS)) \
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pr_err("\t%08x\n", _d); \
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*((p)++) = _d; \
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} while(0)
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#endif
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