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b79029b2e8
Execlists uses a scheduling quantum (a timeslice) to alternate execution between ready-to-run contexts of equal priority. This ensures that all users (though only if they of equal importance) have the opportunity to run and prevents livelocks where contexts may have implicit ordering due to userspace semaphores. However, not all workloads necessarily benefit from timeslicing and in the extreme some sysadmin may want to disable or reduce the timeslicing granularity. The timeslicing mechanism can be compiled out^W^W disabled (but should DCE!) with ./scripts/config --set-val DRM_I915_TIMESLICE_DURATION 0 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191029091632.26281-1-chris@chris-wilson.co.uk
77 lines
3.1 KiB
Plaintext
77 lines
3.1 KiB
Plaintext
config DRM_I915_USERFAULT_AUTOSUSPEND
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int "Runtime autosuspend delay for userspace GGTT mmaps (ms)"
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default 250 # milliseconds
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help
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On runtime suspend, as we suspend the device, we have to revoke
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userspace GGTT mmaps and force userspace to take a pagefault on
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their next access. The revocation and subsequent recreation of
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the GGTT mmap can be very slow and so we impose a small hysteris
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that complements the runtime-pm autosuspend and provides a lower
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floor on the autosuspend delay.
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May be 0 to disable the extra delay and solely use the device level
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runtime pm autosuspend delay tunable.
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config DRM_I915_HEARTBEAT_INTERVAL
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int "Interval between heartbeat pulses (ms)"
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default 2500 # milliseconds
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help
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The driver sends a periodic heartbeat down all active engines to
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check the health of the GPU and undertake regular house-keeping of
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internal driver state.
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May be 0 to disable heartbeats and therefore disable automatic GPU
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hang detection.
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config DRM_I915_PREEMPT_TIMEOUT
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int "Preempt timeout (ms, jiffy granularity)"
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default 100 # milliseconds
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help
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How long to wait (in milliseconds) for a preemption event to occur
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when submitting a new context via execlists. If the current context
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does not hit an arbitration point and yield to HW before the timer
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expires, the HW will be reset to allow the more important context
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to execute.
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May be 0 to disable the timeout.
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config DRM_I915_SPIN_REQUEST
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int "Busywait for request completion (us)"
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default 5 # microseconds
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help
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Before sleeping waiting for a request (GPU operation) to complete,
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we may spend some time polling for its completion. As the IRQ may
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take a non-negligible time to setup, we do a short spin first to
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check if the request will complete in the time it would have taken
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us to enable the interrupt.
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May be 0 to disable the initial spin. In practice, we estimate
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the cost of enabling the interrupt (if currently disabled) to be
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a few microseconds.
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config DRM_I915_STOP_TIMEOUT
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int "How long to wait for an engine to quiesce gracefully before reset (ms)"
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default 100 # milliseconds
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help
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By stopping submission and sleeping for a short time before resetting
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the GPU, we allow the innocent contexts also on the system to quiesce.
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It is then less likely for a hanging context to cause collateral
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damage as the system is reset in order to recover. The corollary is
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that the reset itself may take longer and so be more disruptive to
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interactive or low latency workloads.
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config DRM_I915_TIMESLICE_DURATION
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int "Scheduling quantum for userspace batches (ms, jiffy granularity)"
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default 1 # milliseconds
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help
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When two user batches of equal priority are executing, we will
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alternate execution of each batch to ensure forward progress of
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all users. This is necessary in some cases where there may be
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an implicit dependency between those batches that requires
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concurrent execution in order for them to proceed, e.g. they
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interact with each other via userspace semaphores. Each context
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is scheduled for execution for the timeslice duration, before
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switching to the next context.
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May be 0 to disable timeslicing.
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