mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 09:16:39 +07:00
ca2c68cc7b
The code for handling various restrictions concerning regulatory limits, antenna gain, etc. is very convoluted and duplicated across various EEPROM parsing implementations, making it hard to review. This patch partially cleans up the mess by unifying regulatory limit handling in one function and simplifying handling of antenna gain. It also removes unused transmit power scaling arrays from the EEPROM code, which belonged to an unimplemented API that isn't supposed to be in the driver anyway. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
211 lines
5.1 KiB
C
211 lines
5.1 KiB
C
/*
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* Copyright (c) 2009-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Module for common driver code between ath9k and ath9k_htc
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include "common.h"
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MODULE_AUTHOR("Atheros Communications");
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MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards.");
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MODULE_LICENSE("Dual BSD/GPL");
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int ath9k_cmn_padpos(__le16 frame_control)
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{
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int padpos = 24;
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if (ieee80211_has_a4(frame_control)) {
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padpos += ETH_ALEN;
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}
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if (ieee80211_is_data_qos(frame_control)) {
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padpos += IEEE80211_QOS_CTL_LEN;
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}
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return padpos;
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}
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EXPORT_SYMBOL(ath9k_cmn_padpos);
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int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb)
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{
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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if (tx_info->control.hw_key) {
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switch (tx_info->control.hw_key->cipher) {
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case WLAN_CIPHER_SUITE_WEP40:
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case WLAN_CIPHER_SUITE_WEP104:
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return ATH9K_KEY_TYPE_WEP;
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case WLAN_CIPHER_SUITE_TKIP:
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return ATH9K_KEY_TYPE_TKIP;
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case WLAN_CIPHER_SUITE_CCMP:
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return ATH9K_KEY_TYPE_AES;
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default:
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break;
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}
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}
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return ATH9K_KEY_TYPE_CLEAR;
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}
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EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_keytype);
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static u32 ath9k_get_extchanmode(struct ieee80211_channel *chan,
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enum nl80211_channel_type channel_type)
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{
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u32 chanmode = 0;
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switch (chan->band) {
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case IEEE80211_BAND_2GHZ:
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switch (channel_type) {
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case NL80211_CHAN_NO_HT:
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case NL80211_CHAN_HT20:
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chanmode = CHANNEL_G_HT20;
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break;
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case NL80211_CHAN_HT40PLUS:
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chanmode = CHANNEL_G_HT40PLUS;
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break;
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case NL80211_CHAN_HT40MINUS:
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chanmode = CHANNEL_G_HT40MINUS;
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break;
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}
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break;
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case IEEE80211_BAND_5GHZ:
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switch (channel_type) {
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case NL80211_CHAN_NO_HT:
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case NL80211_CHAN_HT20:
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chanmode = CHANNEL_A_HT20;
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break;
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case NL80211_CHAN_HT40PLUS:
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chanmode = CHANNEL_A_HT40PLUS;
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break;
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case NL80211_CHAN_HT40MINUS:
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chanmode = CHANNEL_A_HT40MINUS;
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break;
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}
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break;
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default:
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break;
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}
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return chanmode;
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}
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/*
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* Update internal channel flags.
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*/
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void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
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struct ieee80211_channel *chan,
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enum nl80211_channel_type channel_type)
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{
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ichan->channel = chan->center_freq;
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ichan->chan = chan;
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if (chan->band == IEEE80211_BAND_2GHZ) {
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ichan->chanmode = CHANNEL_G;
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ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM;
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} else {
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ichan->chanmode = CHANNEL_A;
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ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
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}
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if (channel_type != NL80211_CHAN_NO_HT)
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ichan->chanmode = ath9k_get_extchanmode(chan, channel_type);
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}
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EXPORT_SYMBOL(ath9k_cmn_update_ichannel);
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/*
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* Get the internal channel reference.
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*/
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struct ath9k_channel *ath9k_cmn_get_curchannel(struct ieee80211_hw *hw,
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struct ath_hw *ah)
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{
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struct ieee80211_channel *curchan = hw->conf.channel;
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struct ath9k_channel *channel;
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u8 chan_idx;
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chan_idx = curchan->hw_value;
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channel = &ah->channels[chan_idx];
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ath9k_cmn_update_ichannel(channel, curchan, hw->conf.channel_type);
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return channel;
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}
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EXPORT_SYMBOL(ath9k_cmn_get_curchannel);
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int ath9k_cmn_count_streams(unsigned int chainmask, int max)
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{
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int streams = 0;
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do {
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if (++streams == max)
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break;
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} while ((chainmask = chainmask & (chainmask - 1)));
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return streams;
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}
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EXPORT_SYMBOL(ath9k_cmn_count_streams);
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void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
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u16 new_txpow, u16 *txpower)
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{
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struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
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if (reg->power_limit != new_txpow) {
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ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
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/* read back in case value is clamped */
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*txpower = reg->max_power_level;
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}
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}
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EXPORT_SYMBOL(ath9k_cmn_update_txpow);
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void ath9k_cmn_init_crypto(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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int i = 0;
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/* Get the hardware key cache size. */
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common->keymax = AR_KEYTABLE_SIZE;
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/*
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* Check whether the separate key cache entries
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* are required to handle both tx+rx MIC keys.
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* With split mic keys the number of stations is limited
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* to 27 otherwise 59.
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*/
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if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
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common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
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/*
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* Reset the key cache since some parts do not
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* reset the contents on initial power up.
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*/
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for (i = 0; i < common->keymax; i++)
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ath_hw_keyreset(common, (u16) i);
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}
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EXPORT_SYMBOL(ath9k_cmn_init_crypto);
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static int __init ath9k_cmn_init(void)
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{
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return 0;
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}
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module_init(ath9k_cmn_init);
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static void __exit ath9k_cmn_exit(void)
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{
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return;
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}
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module_exit(ath9k_cmn_exit);
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