linux_dsm_epyc7002/arch/x86/kvm/svm
Krish Sadhukhan e1ebb2b490 KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains
In some hardware implementations, coherency between the encrypted and
unencrypted mappings of the same physical page in a VM is enforced. In
such a system, it is not required for software to flush the VM's page
from all CPU caches in the system prior to changing the value of the
C-bit for the page.

So check that bit before flushing the cache.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lkml.kernel.org/r/20200917212038.5090-4-krish.sadhukhan@oracle.com
2020-09-19 20:46:59 +02:00
..
avic.c KVM: SVM: Add vmcb_ prefix to mark_*() functions 2020-07-08 16:21:48 -04:00
nested.c KVM: nSVM: Correctly set the shadow NPT root level in its MMU role 2020-07-30 18:13:23 -04:00
pmu.c KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in 2020-06-01 04:26:08 -04:00
sev.c KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains 2020-09-19 20:46:59 +02:00
svm.c s390: implement diag318 2020-08-06 12:59:31 -07:00
svm.h KVM: nSVM: prepare to handle errors from enter_svm_guest_mode() 2020-07-10 12:55:13 -04:00
vmenter.S x86/kvm/svm: Move guest enter/exit into .noinstr.text 2020-07-09 07:08:41 -04:00