mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 04:55:14 +07:00
a88c4736ea
RZ/G2E (R8A774C0) SoC also has the R-Car Gen3 compatible SCIF and HSCIF ports, so document the SoC specific bindings. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
145 lines
8.3 KiB
Plaintext
145 lines
8.3 KiB
Plaintext
* Renesas SH-Mobile Serial Communication Interface
|
|
|
|
Required properties:
|
|
|
|
- compatible: Must contain one or more of the following:
|
|
|
|
- "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
|
|
- "renesas,scif-r7s9210" for R7S9210 (RZ/A2) SCIF compatible UART.
|
|
- "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
|
|
- "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
|
|
- "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7744" for R8A7744 (RZ/G1N) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7744" for R8A7744 (RZ/G1N) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7744" for R8A7744 (RZ/G1N) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7744" for R8A7744 (RZ/G1N) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART.
|
|
- "renesas,scif-r8a77470" for R8A77470 (RZ/G1C) SCIF compatible UART.
|
|
- "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART.
|
|
- "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART.
|
|
- "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART.
|
|
- "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART.
|
|
- "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.
|
|
- "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
|
|
- "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7791" for R8A7791 (R-Car M2-W) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7791" for R8A7791 (R-Car M2-W) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7791" for R8A7791 (R-Car M2-W) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7791" for R8A7791 (R-Car M2-W) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7792" for R8A7792 (R-Car V2H) SCIF compatible UART.
|
|
- "renesas,hscif-r8a7792" for R8A7792 (R-Car V2H) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7793" for R8A7793 (R-Car M2-N) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7793" for R8A7793 (R-Car M2-N) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7793" for R8A7793 (R-Car M2-N) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7793" for R8A7793 (R-Car M2-N) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART.
|
|
- "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART.
|
|
- "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART.
|
|
- "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART.
|
|
- "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.
|
|
- "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART.
|
|
- "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART.
|
|
- "renesas,scif-r8a77965" for R8A77965 (R-Car M3-N) SCIF compatible UART.
|
|
- "renesas,hscif-r8a77965" for R8A77965 (R-Car M3-N) HSCIF compatible UART.
|
|
- "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART.
|
|
- "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART.
|
|
- "renesas,scif-r8a77980" for R8A77980 (R-Car V3H) SCIF compatible UART.
|
|
- "renesas,hscif-r8a77980" for R8A77980 (R-Car V3H) HSCIF compatible UART.
|
|
- "renesas,scif-r8a77990" for R8A77990 (R-Car E3) SCIF compatible UART.
|
|
- "renesas,hscif-r8a77990" for R8A77990 (R-Car E3) HSCIF compatible UART.
|
|
- "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART.
|
|
- "renesas,hscif-r8a77995" for R8A77995 (R-Car D3) HSCIF compatible UART.
|
|
- "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
|
|
- "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
|
|
- "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART,
|
|
- "renesas,rcar-gen2-scif" for R-Car Gen2 and RZ/G1 SCIF compatible UART,
|
|
- "renesas,rcar-gen3-scif" for R-Car Gen3 and RZ/G2 SCIF compatible UART,
|
|
- "renesas,rcar-gen2-scifa" for R-Car Gen2 and RZ/G1 SCIFA compatible UART,
|
|
- "renesas,rcar-gen2-scifb" for R-Car Gen2 and RZ/G1 SCIFB compatible UART,
|
|
- "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART,
|
|
- "renesas,rcar-gen2-hscif" for R-Car Gen2 and RZ/G1 HSCIF compatible UART,
|
|
- "renesas,rcar-gen3-hscif" for R-Car Gen3 and RZ/G2 HSCIF compatible UART,
|
|
- "renesas,scif" for generic SCIF compatible UART.
|
|
- "renesas,scifa" for generic SCIFA compatible UART.
|
|
- "renesas,scifb" for generic SCIFB compatible UART.
|
|
- "renesas,hscif" for generic HSCIF compatible UART.
|
|
- "renesas,sci" for generic SCI compatible UART.
|
|
|
|
When compatible with the generic version, nodes must list the
|
|
SoC-specific version corresponding to the platform first, followed by the
|
|
family-specific and/or generic versions.
|
|
|
|
- reg: Base address and length of the I/O registers used by the UART.
|
|
- interrupts: Must contain one or more interrupt-specifiers for the SCIx.
|
|
If a single interrupt is expressed, then all events are
|
|
multiplexed into this single interrupt.
|
|
|
|
If multiple interrupts are provided by the hardware, the order
|
|
in which the interrupts are listed must match order below. Note
|
|
that some HW interrupt events may be muxed together resulting
|
|
in duplicate entries.
|
|
The interrupt order is as follows:
|
|
1. Error (ERI)
|
|
2. Receive buffer full (RXI)
|
|
3. Transmit buffer empty (TXI)
|
|
4. Break (BRI)
|
|
5. Data Ready (DRI)
|
|
6. Transmit End (TEI)
|
|
|
|
- clocks: Must contain a phandle and clock-specifier pair for each entry
|
|
in clock-names.
|
|
- clock-names: Must contain "fck" for the SCIx UART functional clock.
|
|
Apart from the divided functional clock, there may be other possible
|
|
sources for the sampling clock, depending on SCIx variant.
|
|
On (H)SCI(F) and some SCIFA, an additional clock may be specified:
|
|
- "hsck" for the optional external clock input (on HSCIF),
|
|
- "sck" for the optional external clock input (on other variants).
|
|
On UARTs equipped with a Baud Rate Generator for External Clock (BRG)
|
|
(some SCIF and HSCIF), additional clocks may be specified:
|
|
- "brg_int" for the optional internal clock source for the frequency
|
|
divider (typically the (AXI or SHwy) bus clock),
|
|
- "scif_clk" for the optional external clock source for the frequency
|
|
divider (SCIF_CLK).
|
|
|
|
Note: Each enabled SCIx UART may have an optional "serialN" alias in the
|
|
"aliases" node.
|
|
|
|
Optional properties:
|
|
- dmas: Must contain a list of two references to DMA specifiers, one for
|
|
transmission, and one for reception.
|
|
- dma-names: Must contain a list of two DMA names, "tx" and "rx".
|
|
- {cts,dsr,dcd,rng,rts,dtr}-gpios: Specify GPIOs for modem lines, cfr. the
|
|
generic serial DT bindings in serial.txt.
|
|
- uart-has-rtscts: Indicates dedicated lines for RTS/CTS hardware flow
|
|
control, cfr. the generic serial DT bindings in serial.txt.
|
|
|
|
Example:
|
|
aliases {
|
|
serial0 = &scifa0;
|
|
};
|
|
|
|
scifa0: serial@e6c40000 {
|
|
compatible = "renesas,scifa-r8a7790",
|
|
"renesas,rcar-gen2-scifa", "renesas,scifa";
|
|
reg = <0 0xe6c40000 0 64>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
|
|
clock-names = "fck";
|
|
dmas = <&dmac0 0x21>, <&dmac0 0x22>;
|
|
dma-names = "tx", "rx";
|
|
};
|