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03a76b60f8
There is really no way to safely give a user full access to a DMA capable device without an IOMMU to protect the host system. There is also no way to provide DMA translation, for use cases such as device assignment to virtual machines. However, there are still those users that want userspace drivers even under those conditions. The UIO driver exists for this use case, but does not provide the degree of device access and programming that VFIO has. In an effort to avoid code duplication, this introduces a No-IOMMU mode for VFIO. This mode requires building VFIO with CONFIG_VFIO_NOIOMMU and enabling the "enable_unsafe_noiommu_mode" option on the vfio driver. This should make it very clear that this mode is not safe. Additionally, CAP_SYS_RAWIO privileges are necessary to work with groups and containers using this mode. Groups making use of this support are named /dev/vfio/noiommu-$GROUP and can only make use of the special VFIO_NOIOMMU_IOMMU for the container. Use of this mode, specifically binding a device without a native IOMMU group to a VFIO bus driver will taint the kernel and should therefore not be considered supported. This patch includes no-iommu support for the vfio-pci bus driver only. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
604 lines
21 KiB
C
604 lines
21 KiB
C
/*
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* VFIO API definition
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*
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* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _UAPIVFIO_H
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#define _UAPIVFIO_H
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#define VFIO_API_VERSION 0
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/* Kernel & User level defines for VFIO IOCTLs. */
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/* Extensions */
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#define VFIO_TYPE1_IOMMU 1
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#define VFIO_SPAPR_TCE_IOMMU 2
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#define VFIO_TYPE1v2_IOMMU 3
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/*
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* IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This
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* capability is subject to change as groups are added or removed.
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*/
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#define VFIO_DMA_CC_IOMMU 4
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/* Check if EEH is supported */
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#define VFIO_EEH 5
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/* Two-stage IOMMU */
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#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
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#define VFIO_SPAPR_TCE_v2_IOMMU 7
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/*
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* The No-IOMMU IOMMU offers no translation or isolation for devices and
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* supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU
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* code will taint the host kernel and should be used with extreme caution.
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*/
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#define VFIO_NOIOMMU_IOMMU 8
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/*
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* The IOCTL interface is designed for extensibility by embedding the
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* structure length (argsz) and flags into structures passed between
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* kernel and userspace. We therefore use the _IO() macro for these
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* defines to avoid implicitly embedding a size into the ioctl request.
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* As structure fields are added, argsz will increase to match and flag
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* bits will be defined to indicate additional fields with valid data.
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* It's *always* the caller's responsibility to indicate the size of
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* the structure passed by setting argsz appropriately.
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*/
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#define VFIO_TYPE (';')
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#define VFIO_BASE 100
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/* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
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/**
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* VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
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*
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* Report the version of the VFIO API. This allows us to bump the entire
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* API version should we later need to add or change features in incompatible
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* ways.
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* Return: VFIO_API_VERSION
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* Availability: Always
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*/
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#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0)
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/**
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* VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
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*
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* Check whether an extension is supported.
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* Return: 0 if not supported, 1 (or some other positive integer) if supported.
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* Availability: Always
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*/
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#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1)
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/**
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* VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
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*
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* Set the iommu to the given type. The type must be supported by an
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* iommu driver as verified by calling CHECK_EXTENSION using the same
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* type. A group must be set to this file descriptor before this
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* ioctl is available. The IOMMU interfaces enabled by this call are
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* specific to the value set.
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* Return: 0 on success, -errno on failure
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* Availability: When VFIO group attached
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*/
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#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2)
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/* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */
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/**
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* VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3,
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* struct vfio_group_status)
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*
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* Retrieve information about the group. Fills in provided
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* struct vfio_group_info. Caller sets argsz.
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* Return: 0 on succes, -errno on failure.
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* Availability: Always
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*/
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struct vfio_group_status {
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__u32 argsz;
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__u32 flags;
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#define VFIO_GROUP_FLAGS_VIABLE (1 << 0)
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#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1)
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};
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#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3)
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/**
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* VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32)
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*
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* Set the container for the VFIO group to the open VFIO file
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* descriptor provided. Groups may only belong to a single
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* container. Containers may, at their discretion, support multiple
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* groups. Only when a container is set are all of the interfaces
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* of the VFIO file descriptor and the VFIO group file descriptor
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* available to the user.
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* Return: 0 on success, -errno on failure.
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* Availability: Always
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*/
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#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4)
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/**
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* VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5)
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*
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* Remove the group from the attached container. This is the
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* opposite of the SET_CONTAINER call and returns the group to
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* an initial state. All device file descriptors must be released
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* prior to calling this interface. When removing the last group
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* from a container, the IOMMU will be disabled and all state lost,
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* effectively also returning the VFIO file descriptor to an initial
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* state.
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* Return: 0 on success, -errno on failure.
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* Availability: When attached to container
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*/
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#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5)
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/**
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* VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char)
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*
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* Return a new file descriptor for the device object described by
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* the provided string. The string should match a device listed in
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* the devices subdirectory of the IOMMU group sysfs entry. The
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* group containing the device must already be added to this context.
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* Return: new file descriptor on success, -errno on failure.
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* Availability: When attached to container
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*/
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#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6)
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/* --------------- IOCTLs for DEVICE file descriptors --------------- */
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/**
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* VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7,
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* struct vfio_device_info)
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*
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* Retrieve information about the device. Fills in provided
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* struct vfio_device_info. Caller sets argsz.
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* Return: 0 on success, -errno on failure.
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*/
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struct vfio_device_info {
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__u32 argsz;
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__u32 flags;
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#define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */
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#define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */
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#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */
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#define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */
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__u32 num_regions; /* Max region index + 1 */
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__u32 num_irqs; /* Max IRQ index + 1 */
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};
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#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
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/**
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* VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
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* struct vfio_region_info)
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*
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* Retrieve information about a device region. Caller provides
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* struct vfio_region_info with index value set. Caller sets argsz.
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* Implementation of region mapping is bus driver specific. This is
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* intended to describe MMIO, I/O port, as well as bus specific
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* regions (ex. PCI config space). Zero sized regions may be used
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* to describe unimplemented regions (ex. unimplemented PCI BARs).
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* Return: 0 on success, -errno on failure.
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*/
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struct vfio_region_info {
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__u32 argsz;
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__u32 flags;
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#define VFIO_REGION_INFO_FLAG_READ (1 << 0) /* Region supports read */
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#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) /* Region supports write */
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#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) /* Region supports mmap */
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__u32 index; /* Region index */
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__u32 resv; /* Reserved for alignment */
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__u64 size; /* Region size (bytes) */
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__u64 offset; /* Region offset from start of device fd */
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};
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#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
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/**
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* VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
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* struct vfio_irq_info)
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*
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* Retrieve information about a device IRQ. Caller provides
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* struct vfio_irq_info with index value set. Caller sets argsz.
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* Implementation of IRQ mapping is bus driver specific. Indexes
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* using multiple IRQs are primarily intended to support MSI-like
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* interrupt blocks. Zero count irq blocks may be used to describe
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* unimplemented interrupt types.
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*
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* The EVENTFD flag indicates the interrupt index supports eventfd based
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* signaling.
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*
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* The MASKABLE flags indicates the index supports MASK and UNMASK
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* actions described below.
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*
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* AUTOMASKED indicates that after signaling, the interrupt line is
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* automatically masked by VFIO and the user needs to unmask the line
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* to receive new interrupts. This is primarily intended to distinguish
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* level triggered interrupts.
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*
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* The NORESIZE flag indicates that the interrupt lines within the index
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* are setup as a set and new subindexes cannot be enabled without first
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* disabling the entire index. This is used for interrupts like PCI MSI
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* and MSI-X where the driver may only use a subset of the available
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* indexes, but VFIO needs to enable a specific number of vectors
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* upfront. In the case of MSI-X, where the user can enable MSI-X and
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* then add and unmask vectors, it's up to userspace to make the decision
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* whether to allocate the maximum supported number of vectors or tear
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* down setup and incrementally increase the vectors as each is enabled.
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*/
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struct vfio_irq_info {
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__u32 argsz;
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__u32 flags;
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#define VFIO_IRQ_INFO_EVENTFD (1 << 0)
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#define VFIO_IRQ_INFO_MASKABLE (1 << 1)
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#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2)
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#define VFIO_IRQ_INFO_NORESIZE (1 << 3)
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__u32 index; /* IRQ index */
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__u32 count; /* Number of IRQs within this index */
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};
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#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9)
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/**
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* VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set)
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*
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* Set signaling, masking, and unmasking of interrupts. Caller provides
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* struct vfio_irq_set with all fields set. 'start' and 'count' indicate
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* the range of subindexes being specified.
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*
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* The DATA flags specify the type of data provided. If DATA_NONE, the
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* operation performs the specified action immediately on the specified
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* interrupt(s). For example, to unmask AUTOMASKED interrupt [0,0]:
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* flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1.
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*
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* DATA_BOOL allows sparse support for the same on arrays of interrupts.
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* For example, to mask interrupts [0,1] and [0,3] (but not [0,2]):
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* flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3,
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* data = {1,0,1}
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*
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* DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd.
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* A value of -1 can be used to either de-assign interrupts if already
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* assigned or skip un-assigned interrupts. For example, to set an eventfd
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* to be trigger for interrupts [0,0] and [0,2]:
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* flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3,
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* data = {fd1, -1, fd2}
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* If index [0,1] is previously set, two count = 1 ioctls calls would be
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* required to set [0,0] and [0,2] without changing [0,1].
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*
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* Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used
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* with ACTION_TRIGGER to perform kernel level interrupt loopback testing
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* from userspace (ie. simulate hardware triggering).
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*
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* Setting of an event triggering mechanism to userspace for ACTION_TRIGGER
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* enables the interrupt index for the device. Individual subindex interrupts
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* can be disabled using the -1 value for DATA_EVENTFD or the index can be
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* disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0.
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*
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* Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while
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* ACTION_TRIGGER specifies kernel->user signaling.
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*/
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struct vfio_irq_set {
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__u32 argsz;
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__u32 flags;
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#define VFIO_IRQ_SET_DATA_NONE (1 << 0) /* Data not present */
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#define VFIO_IRQ_SET_DATA_BOOL (1 << 1) /* Data is bool (u8) */
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#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) /* Data is eventfd (s32) */
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#define VFIO_IRQ_SET_ACTION_MASK (1 << 3) /* Mask interrupt */
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#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) /* Unmask interrupt */
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#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) /* Trigger interrupt */
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__u32 index;
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__u32 start;
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__u32 count;
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__u8 data[];
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};
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#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10)
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#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | \
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VFIO_IRQ_SET_DATA_BOOL | \
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VFIO_IRQ_SET_DATA_EVENTFD)
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#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | \
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VFIO_IRQ_SET_ACTION_UNMASK | \
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VFIO_IRQ_SET_ACTION_TRIGGER)
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/**
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* VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11)
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*
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* Reset a device.
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*/
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#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11)
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/*
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* The VFIO-PCI bus driver makes use of the following fixed region and
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* IRQ index mapping. Unimplemented regions return a size of zero.
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* Unimplemented IRQ types return a count of zero.
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*/
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enum {
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VFIO_PCI_BAR0_REGION_INDEX,
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VFIO_PCI_BAR1_REGION_INDEX,
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VFIO_PCI_BAR2_REGION_INDEX,
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VFIO_PCI_BAR3_REGION_INDEX,
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VFIO_PCI_BAR4_REGION_INDEX,
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VFIO_PCI_BAR5_REGION_INDEX,
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VFIO_PCI_ROM_REGION_INDEX,
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VFIO_PCI_CONFIG_REGION_INDEX,
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/*
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* Expose VGA regions defined for PCI base class 03, subclass 00.
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* This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
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* as well as the MMIO range 0xa0000 to 0xbffff. Each implemented
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* range is found at it's identity mapped offset from the region
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* offset, for example 0x3b0 is region_info.offset + 0x3b0. Areas
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* between described ranges are unimplemented.
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*/
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VFIO_PCI_VGA_REGION_INDEX,
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VFIO_PCI_NUM_REGIONS
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};
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enum {
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VFIO_PCI_INTX_IRQ_INDEX,
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VFIO_PCI_MSI_IRQ_INDEX,
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VFIO_PCI_MSIX_IRQ_INDEX,
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VFIO_PCI_ERR_IRQ_INDEX,
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VFIO_PCI_REQ_IRQ_INDEX,
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VFIO_PCI_NUM_IRQS
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};
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/**
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* VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
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* struct vfio_pci_hot_reset_info)
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*
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* Return: 0 on success, -errno on failure:
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* -enospc = insufficient buffer, -enodev = unsupported for device.
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*/
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struct vfio_pci_dependent_device {
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__u32 group_id;
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__u16 segment;
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__u8 bus;
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__u8 devfn; /* Use PCI_SLOT/PCI_FUNC */
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};
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struct vfio_pci_hot_reset_info {
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__u32 argsz;
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__u32 flags;
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__u32 count;
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struct vfio_pci_dependent_device devices[];
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};
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#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
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/**
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* VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
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* struct vfio_pci_hot_reset)
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*
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* Return: 0 on success, -errno on failure.
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*/
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struct vfio_pci_hot_reset {
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__u32 argsz;
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__u32 flags;
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__u32 count;
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__s32 group_fds[];
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};
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#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13)
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/* -------- API for Type1 VFIO IOMMU -------- */
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/**
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* VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info)
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*
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* Retrieve information about the IOMMU object. Fills in provided
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* struct vfio_iommu_info. Caller sets argsz.
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*
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* XXX Should we do these by CHECK_EXTENSION too?
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*/
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struct vfio_iommu_type1_info {
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__u32 argsz;
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__u32 flags;
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#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */
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__u64 iova_pgsizes; /* Bitmap of supported page sizes */
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};
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#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
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/**
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* VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map)
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*
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* Map process virtual addresses to IO virtual addresses using the
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* provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required.
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*/
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struct vfio_iommu_type1_dma_map {
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__u32 argsz;
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__u32 flags;
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#define VFIO_DMA_MAP_FLAG_READ (1 << 0) /* readable from device */
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#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) /* writable from device */
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__u64 vaddr; /* Process virtual address */
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__u64 iova; /* IO virtual address */
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__u64 size; /* Size of mapping (bytes) */
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};
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#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
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/**
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* VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14,
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* struct vfio_dma_unmap)
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*
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* Unmap IO virtual addresses using the provided struct vfio_dma_unmap.
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* Caller sets argsz. The actual unmapped size is returned in the size
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* field. No guarantee is made to the user that arbitrary unmaps of iova
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* or size different from those used in the original mapping call will
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* succeed.
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*/
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struct vfio_iommu_type1_dma_unmap {
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__u32 argsz;
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__u32 flags;
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__u64 iova; /* IO virtual address */
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__u64 size; /* Size of mapping (bytes) */
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};
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#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
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/*
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* IOCTLs to enable/disable IOMMU container usage.
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* No parameters are supported.
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*/
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#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15)
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#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16)
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/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
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/*
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* The SPAPR TCE DDW info struct provides the information about
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* the details of Dynamic DMA window capability.
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*
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* @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
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* @max_dynamic_windows_supported tells the maximum number of windows
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* which the platform can create.
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* @levels tells the maximum number of levels in multi-level IOMMU tables;
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* this allows splitting a table into smaller chunks which reduces
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* the amount of physically contiguous memory required for the table.
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*/
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struct vfio_iommu_spapr_tce_ddw_info {
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__u64 pgsizes; /* Bitmap of supported page sizes */
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__u32 max_dynamic_windows_supported;
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__u32 levels;
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};
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/*
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* The SPAPR TCE info struct provides the information about the PCI bus
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* address ranges available for DMA, these values are programmed into
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* the hardware so the guest has to know that information.
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*
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* The DMA 32 bit window start is an absolute PCI bus address.
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* The IOVA address passed via map/unmap ioctls are absolute PCI bus
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* addresses too so the window works as a filter rather than an offset
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* for IOVA addresses.
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*
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* Flags supported:
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* - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
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* (DDW) support is present. @ddw is only supported when DDW is present.
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*/
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struct vfio_iommu_spapr_tce_info {
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__u32 argsz;
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__u32 flags;
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#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */
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__u32 dma32_window_start; /* 32 bit window start (bytes) */
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__u32 dma32_window_size; /* 32 bit window size (bytes) */
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struct vfio_iommu_spapr_tce_ddw_info ddw;
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};
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#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
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|
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/*
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* EEH PE operation struct provides ways to:
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* - enable/disable EEH functionality;
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* - unfreeze IO/DMA for frozen PE;
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* - read PE state;
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* - reset PE;
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* - configure PE;
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* - inject EEH error.
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*/
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struct vfio_eeh_pe_err {
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__u32 type;
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|
__u32 func;
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__u64 addr;
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|
__u64 mask;
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};
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|
|
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struct vfio_eeh_pe_op {
|
|
__u32 argsz;
|
|
__u32 flags;
|
|
__u32 op;
|
|
union {
|
|
struct vfio_eeh_pe_err err;
|
|
};
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|
};
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|
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#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
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#define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */
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|
#define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */
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|
#define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */
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#define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */
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|
#define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */
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|
#define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */
|
|
#define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */
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|
#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */
|
|
#define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */
|
|
#define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */
|
|
#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
|
|
#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
|
|
#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
|
|
#define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */
|
|
|
|
#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
|
|
|
|
/**
|
|
* VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
|
|
*
|
|
* Registers user space memory where DMA is allowed. It pins
|
|
* user pages and does the locked memory accounting so
|
|
* subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
|
|
* get faster.
|
|
*/
|
|
struct vfio_iommu_spapr_register_memory {
|
|
__u32 argsz;
|
|
__u32 flags;
|
|
__u64 vaddr; /* Process virtual address */
|
|
__u64 size; /* Size of mapping (bytes) */
|
|
};
|
|
#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
|
|
|
|
/**
|
|
* VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
|
|
*
|
|
* Unregisters user space memory registered with
|
|
* VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
|
|
* Uses vfio_iommu_spapr_register_memory for parameters.
|
|
*/
|
|
#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
|
|
|
|
/**
|
|
* VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
|
|
*
|
|
* Creates an additional TCE table and programs it (sets a new DMA window)
|
|
* to every IOMMU group in the container. It receives page shift, window
|
|
* size and number of levels in the TCE table being created.
|
|
*
|
|
* It allocates and returns an offset on a PCI bus of the new DMA window.
|
|
*/
|
|
struct vfio_iommu_spapr_tce_create {
|
|
__u32 argsz;
|
|
__u32 flags;
|
|
/* in */
|
|
__u32 page_shift;
|
|
__u32 __resv1;
|
|
__u64 window_size;
|
|
__u32 levels;
|
|
__u32 __resv2;
|
|
/* out */
|
|
__u64 start_addr;
|
|
};
|
|
#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
|
|
|
|
/**
|
|
* VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
|
|
*
|
|
* Unprograms a TCE table from all groups in the container and destroys it.
|
|
* It receives a PCI bus offset as a window id.
|
|
*/
|
|
struct vfio_iommu_spapr_tce_remove {
|
|
__u32 argsz;
|
|
__u32 flags;
|
|
/* in */
|
|
__u64 start_addr;
|
|
};
|
|
#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
|
|
|
|
/* ***************************************************************** */
|
|
|
|
#endif /* _UAPIVFIO_H */
|