mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 02:36:42 +07:00
9b6d351a75
DT and DT-conversion-related changes for various ARM platforms. Most of these are to enable various devices on various boards, etc, and not necessarily worth enumerating. New boards and systems continue to come in as new devicetree files that don't require corresponding C changes any more, which is indicating that the system is starting to work fairly well. A few things worth pointing out: * ST Ericsson ux500 platforms have made the major push to move over to fully support the platform with DT. * Renesas platforms continue their conversion over from legacy platform devices to DT-based for hardware description. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJS4Vg8AAoJEIwa5zzehBx3tRkP/2dXiXerdB6V63HQ2UjA0J1w wnEqOrHXhIBPHVsAjRs+JOqG1iHxwQ+6qPtpxy//OZy5EN/hTamU5HBAKwcJvbbS He+a2xhOK6nsjr5QrEk2wupXOodhXDXoaU2mqJ51HAN9AOS68QVbHFh1jHs0f7S0 RaPVqHTlpXiiWMZ1ScVwl6qqM/hVcK6H3WOrHz09RWG2V/rFth4cJ6hkXBgqBeYU Zl24Z9mzStaTI7epDEZXq7jZTMX5lzArL2mCA0jKA+YdEy7KSh5GEzqDGu2qi230 wwmJ3g5X1WxDvedXPL0+gUffL7UcHWlEV1nl5KtwVsPf/vpsAUvwPLdlObUgA2nr /cVrdwQYLaPJKg6xq8IWxaS0K34kLdJyUwiNjKxw5s2GayWEwqGRWALn9TANdKz7 Wg+RT0UxjHPL8zj/N1uQV/fTdayHE6PnTPorESKDK0a6q9qqzdUypV3j13d9faIS FbASmq35zO2iOo4ji7SX6wP4ZwPWV1Yx9UBl4RNDlWu9MyB6jsjiJFT1nyr5PxGo WCf8U1Nv4tqCo01gE8AHR1qzlW7cOoya7VMTwDme6J5N9K3GpN+OXqCVItT1lfL2 s2I0OI6TiD7pTAM4WkgCZaKAhPaE/i2Vc9xlGdZ8L77J4allBtLXTAPpIAZj1Lfl a7NT9hbUIiEkTnO8BhHm =4o2d -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "DT and DT-conversion-related changes for various ARM platforms. Most of these are to enable various devices on various boards, etc, and not necessarily worth enumerating. New boards and systems continue to come in as new devicetree files that don't require corresponding C changes any more, which is indicating that the system is starting to work fairly well. A few things worth pointing out: * ST Ericsson ux500 platforms have made the major push to move over to fully support the platform with DT * Renesas platforms continue their conversion over from legacy platform devices to DT-based for hardware description" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (327 commits) ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6 ARM: dts: sirf: add lost minigpsrtc device node ARM: dts: sirf: add clock, frequence-voltage table for CPU0 ARM: dts: sirf: add lost bus_width, clock and status for sdhci ARM: dts: sirf: add lost clocks for cphifbg ARM: dts: socfpga: add pl330 clock ARM: dts: socfpga: update L2 tag and data latency arm: sun7i: cubietruck: Enable the i2c controllers ARM: dts: add support for EXYNOS4412 based TINY4412 board ARM: dts: Add initial support for Arndale Octa board ARM: bcm2835: add USB controller to device tree ARM: dts: MSM8974: Add MMIO architected timer node ARM: dts: MSM8974: Add restart node ARM: dts: sun7i: external clock outputs ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style ARM: dts: sun7i: Add pin muxing options for clock outputs ARM: dts: sun7i: Add rtp controller node ARM: dts: sun5i: Add rtp controller node ARM: dts: sun4i: Add rtp controller node ...
534 lines
14 KiB
Plaintext
534 lines
14 KiB
Plaintext
#include "tegra20.dtsi"
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/ {
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model = "Toradex Colibri T20 512MB";
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compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
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aliases {
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rtc0 = "/i2c@7000d000/tps6586x@34";
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rtc1 = "/rtc@7000e000";
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};
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memory {
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reg = <0x00000000 0x20000000>;
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};
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host1x@50000000 {
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hdmi@54280000 {
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vdd-supply = <&hdmi_vdd_reg>;
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pll-supply = <&hdmi_pll_reg>;
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nvidia,ddc-i2c-bus = <&i2c_ddc>;
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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GPIO_ACTIVE_HIGH>;
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};
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};
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pinmux@70000014 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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audio_refclk {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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crt {
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nvidia,pins = "crtp";
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nvidia,function = "crt";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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displaya {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3",
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"ld4", "ld5", "ld6", "ld7", "ld8",
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"ld9", "ld10", "ld11", "ld12", "ld13",
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"ld14", "ld15", "ld16", "ld17",
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"lhs", "lpw0", "lpw2", "lsc0",
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"lsc1", "lsck", "lsda", "lspi", "lvs";
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nvidia,function = "displaya";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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gpio_dte {
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nvidia,pins = "dte";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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gpio_gmi {
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nvidia,pins = "ata", "atc", "atd", "ate",
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"dap1", "dap2", "dap4", "gpu", "irrx",
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"irtx", "spia", "spib", "spic";
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nvidia,function = "gmi";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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gpio_pta {
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nvidia,pins = "pta";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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gpio_uac {
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nvidia,pins = "uac";
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nvidia,function = "rsvd2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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hdint {
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nvidia,pins = "hdint";
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nvidia,function = "hdmi";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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i2c1 {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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i2c3 {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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i2cddc {
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nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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irda {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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nand {
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nvidia,pins = "kbca", "kbcc", "kbcd",
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"kbce", "kbcf";
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nvidia,function = "nand";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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owc {
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nvidia,pins = "owc";
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nvidia,function = "owr";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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pwm {
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nvidia,pins = "sdb", "sdc", "sdd";
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nvidia,function = "pwm";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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sdio4 {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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spi1 {
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nvidia,pins = "spid", "spie", "spif";
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nvidia,function = "spi1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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spi4 {
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nvidia,pins = "slxa", "slxc", "slxd", "slxk";
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nvidia,function = "spi4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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uarta {
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nvidia,pins = "sdio1";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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uartd {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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ulpi {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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ulpi_refclk {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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usb_gpio {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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vi {
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nvidia,pins = "dta", "dtb", "dtc", "dtd";
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nvidia,function = "vi";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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vi_sc {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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};
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};
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ac97: ac97@70002000 {
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status = "okay";
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nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
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GPIO_ACTIVE_HIGH>;
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nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)
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GPIO_ACTIVE_HIGH>;
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};
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i2c@7000c000 {
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clock-frequency = <400000>;
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};
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i2c_ddc: i2c@7000c400 {
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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clock-frequency = <400000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <400000>;
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pmic: tps6586x@34 {
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compatible = "ti,tps6586x";
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reg = <0x34>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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ti,system-power-controller;
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#gpio-cells = <2>;
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gpio-controller;
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sys-supply = <&vdd_3v3_reg>;
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vin-sm0-supply = <&sys_reg>;
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vin-sm1-supply = <&sys_reg>;
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vin-sm2-supply = <&sys_reg>;
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vinldo01-supply = <&sm2_reg>;
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vinldo23-supply = <&vdd_3v3_reg>;
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vinldo4-supply = <&vdd_3v3_reg>;
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vinldo678-supply = <&vdd_3v3_reg>;
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vinldo9-supply = <&vdd_3v3_reg>;
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regulators {
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#address-cells = <1>;
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#size-cells = <0>;
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sys_reg: regulator@0 {
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reg = <0>;
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regulator-compatible = "sys";
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regulator-name = "vdd_sys";
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regulator-always-on;
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};
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regulator@1 {
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reg = <1>;
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regulator-compatible = "sm0";
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regulator-name = "vdd_sm0,vdd_core";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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regulator@2 {
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reg = <2>;
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regulator-compatible = "sm1";
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regulator-name = "vdd_sm1,vdd_cpu";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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sm2_reg: regulator@3 {
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reg = <3>;
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regulator-compatible = "sm2";
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regulator-name = "vdd_sm2,vin_ldo*";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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/* LDO0 is not connected to anything */
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regulator@5 {
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reg = <5>;
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regulator-compatible = "ldo1";
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regulator-name = "vdd_ldo1,avdd_pll*";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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};
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regulator@6 {
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reg = <6>;
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regulator-compatible = "ldo2";
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regulator-name = "vdd_ldo2,vdd_rtc";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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/* LDO3 is not connected to anything */
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regulator@8 {
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reg = <8>;
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regulator-compatible = "ldo4";
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regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo5_reg: regulator@9 {
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reg = <9>;
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regulator-compatible = "ldo5";
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regulator-name = "vdd_ldo5,vdd_fuse";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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regulator@10 {
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reg = <10>;
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regulator-compatible = "ldo6";
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regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <2850000>;
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};
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hdmi_vdd_reg: regulator@11 {
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reg = <11>;
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regulator-compatible = "ldo7";
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regulator-name = "vdd_ldo7,avdd_hdmi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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hdmi_pll_reg: regulator@12 {
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reg = <12>;
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regulator-compatible = "ldo8";
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regulator-name = "vdd_ldo8,avdd_hdmi_pll";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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regulator@13 {
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reg = <13>;
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regulator-compatible = "ldo9";
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regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <2850000>;
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regulator-always-on;
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};
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regulator@14 {
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reg = <14>;
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regulator-compatible = "ldo_rtc";
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regulator-name = "vdd_rtc_out,vdd_cell";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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temperature-sensor@4c {
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compatible = "national,lm95245";
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reg = <0x4c>;
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};
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};
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pmc@7000e400 {
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nvidia,suspend-mode = <1>;
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nvidia,cpu-pwr-good-time = <5000>;
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nvidia,cpu-pwr-off-time = <5000>;
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nvidia,core-pwr-good-time = <3845 3845>;
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nvidia,core-pwr-off-time = <3875>;
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nvidia,sys-clock-req-active-high;
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};
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memory-controller@7000f400 {
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emc-table@83250 {
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reg = <83250>;
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compatible = "nvidia,tegra20-emc-table";
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clock-frequency = <83250>;
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nvidia,emc-registers = <0x00000005 0x00000011
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0x00000004 0x00000002 0x00000004 0x00000004
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0x00000001 0x0000000a 0x00000002 0x00000002
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0x00000001 0x00000001 0x00000003 0x00000004
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0x00000003 0x00000009 0x0000000c 0x0000025f
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0x00000000 0x00000003 0x00000003 0x00000002
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0x00000002 0x00000001 0x00000008 0x000000c8
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0x00000003 0x00000005 0x00000003 0x0000000c
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0x00000002 0x00000000 0x00000000 0x00000002
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0x00000000 0x00000000 0x00000083 0x00520006
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0x00000010 0x00000008 0x00000000 0x00000000
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0x00000000 0x00000000 0x00000000 0x00000000>;
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};
|
|
emc-table@133200 {
|
|
reg = <133200>;
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
clock-frequency = <133200>;
|
|
nvidia,emc-registers = <0x00000008 0x00000019
|
|
0x00000006 0x00000002 0x00000004 0x00000004
|
|
0x00000001 0x0000000a 0x00000002 0x00000002
|
|
0x00000002 0x00000001 0x00000003 0x00000004
|
|
0x00000003 0x00000009 0x0000000c 0x0000039f
|
|
0x00000000 0x00000003 0x00000003 0x00000002
|
|
0x00000002 0x00000001 0x00000008 0x000000c8
|
|
0x00000003 0x00000007 0x00000003 0x0000000c
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
0x00000000 0x00000000 0x00000083 0x00510006
|
|
0x00000010 0x00000008 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
};
|
|
emc-table@166500 {
|
|
reg = <166500>;
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
clock-frequency = <166500>;
|
|
nvidia,emc-registers = <0x0000000a 0x00000021
|
|
0x00000008 0x00000003 0x00000004 0x00000004
|
|
0x00000002 0x0000000a 0x00000003 0x00000003
|
|
0x00000002 0x00000001 0x00000003 0x00000004
|
|
0x00000003 0x00000009 0x0000000c 0x000004df
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
0x00000003 0x00000001 0x00000009 0x000000c8
|
|
0x00000003 0x00000009 0x00000004 0x0000000c
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
0x00000000 0x00000000 0x00000083 0x004f0006
|
|
0x00000010 0x00000008 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
};
|
|
emc-table@333000 {
|
|
reg = <333000>;
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
clock-frequency = <333000>;
|
|
nvidia,emc-registers = <0x00000014 0x00000041
|
|
0x0000000f 0x00000005 0x00000004 0x00000005
|
|
0x00000003 0x0000000a 0x00000005 0x00000005
|
|
0x00000004 0x00000001 0x00000003 0x00000004
|
|
0x00000003 0x00000009 0x0000000c 0x000009ff
|
|
0x00000000 0x00000003 0x00000003 0x00000005
|
|
0x00000005 0x00000001 0x0000000e 0x000000c8
|
|
0x00000003 0x00000011 0x00000006 0x0000000c
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
0x00000000 0x00000000 0x00000083 0x00380006
|
|
0x00000010 0x00000008 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
};
|
|
};
|
|
|
|
usb@c5004000 {
|
|
status = "okay";
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
|
|
GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
usb-phy@c5004000 {
|
|
status = "okay";
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
|
|
GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sdhci@c8000600 {
|
|
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
clocks {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
clk32k_in: clock@0 {
|
|
compatible = "fixed-clock";
|
|
reg=<0>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
vdd_3v3_reg: regulator@100 {
|
|
compatible = "regulator-fixed";
|
|
reg = <100>;
|
|
regulator-name = "vdd_3v3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@101 {
|
|
compatible = "regulator-fixed";
|
|
reg = <101>;
|
|
regulator-name = "internal_usb";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
|
|
"nvidia,tegra-audio-wm9712";
|
|
nvidia,model = "Colibri T20 AC97 Audio";
|
|
|
|
nvidia,audio-routing =
|
|
"Headphone", "HPOUTL",
|
|
"Headphone", "HPOUTR",
|
|
"LineIn", "LINEINL",
|
|
"LineIn", "LINEINR",
|
|
"Mic", "MIC1";
|
|
|
|
nvidia,ac97-controller = <&ac97>;
|
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
};
|
|
};
|