mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 05:40:53 +07:00
e18e2a00ef
This is the long overdue conversion of sparc64 over to the generic IRQ layer. The kernel image is slightly larger, but the BSS is ~60K smaller due to the reduced size of struct ino_bucket. A lot of IRQ implementation details, including ino_bucket, were moved out of asm-sparc64/irq.h and are now private to arch/sparc64/kernel/irq.c, and most of the code in irq.c totally disappeared. One thing that's different at the moment is IRQ distribution, we do it at enable_irq() time. If the cpu mask is ALL then we round-robin using a global rotating cpu counter, else we pick the first cpu in the mask to support single cpu targetting. This is similar to what powerpc's XICS IRQ support code does. This works fine on my UP SB1000, and the SMP build goes fine and runs on that machine, but lots of testing on different setups is needed. Signed-off-by: David S. Miller <davem@davemloft.net>
20 lines
402 B
C
20 lines
402 B
C
/* hardirq.h: 64-bit Sparc hard IRQ support.
|
|
*
|
|
* Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net)
|
|
*/
|
|
|
|
#ifndef __SPARC64_HARDIRQ_H
|
|
#define __SPARC64_HARDIRQ_H
|
|
|
|
#include <asm/cpudata.h>
|
|
|
|
#define __ARCH_IRQ_STAT
|
|
#define local_softirq_pending() \
|
|
(local_cpu_data().__softirq_pending)
|
|
|
|
void ack_bad_irq(unsigned int irq);
|
|
|
|
#define HARDIRQ_BITS 8
|
|
|
|
#endif /* !(__SPARC64_HARDIRQ_H) */
|