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e0d8b2ec53
The nomips16 has to be added both as function attribute and assembler directive. When only function attribute is specified, the compiler will inline the function with -Os optimization. The generated assembly code cannot be correctly assembled because ISA mode switch has to be done through jump instruction. When only ".set nomips16" directive is used, the generated assembly code will use MIPS32 code for the inline assembly template and MIPS16 for the function return. The compiled binary is invalid: 00403100 <__arch_swab16>: 403100: 7c0410a0 wsbh v0,a0 403104: e820ea31 swc2 $0,-5583(at) while correct code should be: 00402650 <__arch_swab16>: 402650: 7c0410a0 wsbh v0,a0 402654: 03e00008 jr ra 402658: 3042ffff andi v0,v0,0xffff Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Cc: Chen Jie <chenj@lemote.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11087/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
76 lines
1.5 KiB
C
76 lines
1.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996, 99, 2003 by Ralf Baechle
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*/
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#ifndef _ASM_SWAB_H
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#define _ASM_SWAB_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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#define __SWAB_64_THRU_32__
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#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
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defined(_MIPS_ARCH_LOONGSON3A)
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static inline __attribute__((nomips16)) __attribute_const__
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__u16 __arch_swab16(__u16 x)
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{
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__asm__(
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" .set push \n"
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" .set arch=mips32r2 \n"
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" .set nomips16 \n"
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" wsbh %0, %1 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch_swab16 __arch_swab16
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static inline __attribute__((nomips16)) __attribute_const__
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__u32 __arch_swab32(__u32 x)
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{
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__asm__(
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" .set push \n"
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" .set arch=mips32r2 \n"
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" .set nomips16 \n"
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" wsbh %0, %1 \n"
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" rotr %0, %0, 16 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch_swab32 __arch_swab32
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/*
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* Having already checked for MIPS R2, enable the optimized version for
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* 64-bit kernel on r2 CPUs.
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*/
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#ifdef __mips64
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static inline __attribute__((nomips16)) __attribute_const__
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__u64 __arch_swab64(__u64 x)
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{
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__asm__(
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" .set push \n"
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" .set arch=mips64r2 \n"
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" .set nomips16 \n"
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" dsbh %0, %1 \n"
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" dshd %0, %0 \n"
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" .set pop \n"
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: "=r" (x)
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: "r" (x));
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return x;
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}
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#define __arch_swab64 __arch_swab64
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#endif /* __mips64 */
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#endif /* MIPS R2 or newer or Loongson 3A */
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#endif /* _ASM_SWAB_H */
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