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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ef1313deaf
Add a VMX optimised xor, used primarily for RAID5. On a POWER7 blade this is a decent win: 32regs : 17932.800 MB/sec altivec : 19724.800 MB/sec The bigger gain is when the same test is run in SMT4 mode, as it would if there was a lot of work going on: 8regs : 8377.600 MB/sec altivec : 15801.600 MB/sec I tested this against an array created without the patch, and also verified it worked as expected on a little endian kernel. [ Fix !CONFIG_ALTIVEC build -- BenH ] Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) IBM Corporation, 2012
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*
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* Author: Anton Blanchard <anton@au.ibm.com>
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*/
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#ifndef _ASM_POWERPC_XOR_H
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#define _ASM_POWERPC_XOR_H
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#ifdef CONFIG_ALTIVEC
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#include <asm/cputable.h>
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void xor_altivec_2(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in);
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void xor_altivec_3(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in, unsigned long *v3_in);
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void xor_altivec_4(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in, unsigned long *v3_in,
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unsigned long *v4_in);
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void xor_altivec_5(unsigned long bytes, unsigned long *v1_in,
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unsigned long *v2_in, unsigned long *v3_in,
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unsigned long *v4_in, unsigned long *v5_in);
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static struct xor_block_template xor_block_altivec = {
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.name = "altivec",
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.do_2 = xor_altivec_2,
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.do_3 = xor_altivec_3,
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.do_4 = xor_altivec_4,
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.do_5 = xor_altivec_5,
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};
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#define XOR_SPEED_ALTIVEC() \
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do { \
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if (cpu_has_feature(CPU_FTR_ALTIVEC)) \
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xor_speed(&xor_block_altivec); \
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} while (0)
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#else
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#define XOR_SPEED_ALTIVEC()
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#endif
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/* Also try the generic routines. */
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#include <asm-generic/xor.h>
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#undef XOR_TRY_TEMPLATES
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#define XOR_TRY_TEMPLATES \
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do { \
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xor_speed(&xor_block_8regs); \
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xor_speed(&xor_block_8regs_p); \
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xor_speed(&xor_block_32regs); \
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xor_speed(&xor_block_32regs_p); \
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XOR_SPEED_ALTIVEC(); \
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} while (0)
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#endif /* _ASM_POWERPC_XOR_H */
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