mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 16:09:57 +07:00
9d9a152eba
On Bay Trail and Cherry Trail devices we set the pm_disabled flag for I2C busses which the OS shares with the PUNIT as these need special handling. Until now we called dev_pm_syscore_device(dev, true) for I2C controllers with this flag set to keep these I2C controllers always on. After commit12864ff854
("ACPI / LPSS: Avoid PM quirks on suspend and resume from hibernation"), this no longer works. This commit modifies lpss_iosf_exit_d3_state() to only run if lpss_iosf_enter_d3_state() has ran before it, so that it does not run on a resume from hibernate (or from S3). On these systems the conditions for lpss_iosf_enter_d3_state() to run never become true, so lpss_iosf_exit_d3_state() never gets called and the 2 LPSS DMA controllers never get forced into D0 mode, instead they are left in their default automatic power-on when needed mode. The not forcing of D0 mode for the DMA controllers enables these systems to properly enter S0ix modes, which is a good thing. But after entering S0ix modes the I2C controller connected to the PMIC no longer works, leading to e.g. broken battery monitoring. The _PS3 method for this I2C controller looks like this: Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 { If ((((PMID == 0x04) || (PMID == 0x05)) || (PMID == 0x06))) { Return (Zero) } PSAT |= 0x03 Local0 = PSAT /* \_SB_.I2C5.PSAT */ } Where PMID = 0x05, so we enter the Return (Zero) path on these systems. So even if we were to not call dev_pm_syscore_device(dev, true) the I2C controller will be left in D0 rather then be switched to D3. Yet on other Bay and Cherry Trail devices S0ix is not entered unless *all* I2C controllers are in D3 mode. This combined with the I2C controller no longer working now that we reach S0ix states on these systems leads to me believing that the PUNIT itself puts the I2C controller in D3 when all other conditions for entering S0ix states are true. Since now the I2C controller is put in D3 over a suspend/resume we must re-initialize it afterwards and that does indeed fix it no longer working. This commit implements this fix by: 1) Making the suspend_late callback a no-op if pm_disabled is set and making the resume_early callback skip the clock re-enable (since it now was not disabled) while still doing the necessary I2C controller re-init. 2) Removing the dev_pm_syscore_device(dev, true) call, so that the suspend and resume callbacks are actually called. Normally this would cause the ACPI pm code to call _PS3 putting the I2C controller in D3, wreaking havoc since it is shared with the PUNIT, but in this special case the _PS3 method is a no-op so we can safely allow a "fake" suspend / resume. Fixes:12864ff854
("ACPI / LPSS: Avoid PM quirks on suspend and resume ...") Link: https://bugzilla.kernel.org/show_bug.cgi?id=200861 Cc: 4.15+ <stable@vger.kernel.org> # 4.15+ Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
499 lines
12 KiB
C
499 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Synopsys DesignWare I2C adapter driver.
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*
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* Based on the TI DAVINCI I2C adapter driver.
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*
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* Copyright (C) 2006 Texas Instruments.
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* Copyright (C) 2007 MontaVista Software Inc.
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* Copyright (C) 2009 Provigent Ltd.
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*/
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#include <linux/acpi.h>
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_data/i2c-designware.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/reset.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/suspend.h>
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#include "i2c-designware-core.h"
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static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
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{
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return clk_get_rate(dev->clk)/1000;
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}
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#ifdef CONFIG_ACPI
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/*
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* The HCNT/LCNT information coming from ACPI should be the most accurate
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* for given platform. However, some systems get it wrong. On such systems
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* we get better results by calculating those based on the input clock.
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*/
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static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
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{
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.ident = "Dell Inspiron 7348",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
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},
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},
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{ }
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};
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static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
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u16 *hcnt, u16 *lcnt, u32 *sda_hold)
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{
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struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
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acpi_handle handle = ACPI_HANDLE(&pdev->dev);
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union acpi_object *obj;
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if (dmi_check_system(dw_i2c_no_acpi_params))
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return;
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if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
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return;
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obj = (union acpi_object *)buf.pointer;
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if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
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const union acpi_object *objs = obj->package.elements;
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*hcnt = (u16)objs[0].integer.value;
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*lcnt = (u16)objs[1].integer.value;
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*sda_hold = (u32)objs[2].integer.value;
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}
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kfree(buf.pointer);
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}
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static int dw_i2c_acpi_configure(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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struct i2c_timings *t = &dev->timings;
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u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
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acpi_handle handle = ACPI_HANDLE(&pdev->dev);
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const struct acpi_device_id *id;
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struct acpi_device *adev;
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const char *uid;
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dev->adapter.nr = -1;
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dev->tx_fifo_depth = 32;
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dev->rx_fifo_depth = 32;
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/*
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* Try to get SDA hold time and *CNT values from an ACPI method for
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* selected speed modes.
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*/
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dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
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dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
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dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
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dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
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switch (t->bus_freq_hz) {
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case 100000:
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dev->sda_hold_time = ss_ht;
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break;
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case 1000000:
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dev->sda_hold_time = fp_ht;
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break;
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case 3400000:
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dev->sda_hold_time = hs_ht;
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break;
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case 400000:
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default:
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dev->sda_hold_time = fs_ht;
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break;
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}
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id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
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if (id && id->driver_data)
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dev->flags |= (u32)id->driver_data;
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if (acpi_bus_get_device(handle, &adev))
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return -ENODEV;
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/*
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* Cherrytrail I2C7 gets used for the PMIC which gets accessed
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* through ACPI opregions during late suspend / early resume
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* disable pm for it.
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*/
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uid = adev->pnp.unique_id;
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if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
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dev->pm_disabled = true;
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return 0;
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}
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static const struct acpi_device_id dw_i2c_acpi_match[] = {
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{ "INT33C2", 0 },
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{ "INT33C3", 0 },
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{ "INT3432", 0 },
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{ "INT3433", 0 },
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{ "80860F41", 0 },
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{ "808622C1", MODEL_CHERRYTRAIL },
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{ "AMD0010", ACCESS_INTR_MASK },
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{ "AMDI0010", ACCESS_INTR_MASK },
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{ "AMDI0510", 0 },
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{ "APMC0D0F", 0 },
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{ "HISI02A1", 0 },
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{ "HISI02A2", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
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#else
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static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
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{
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return -ENODEV;
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}
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#endif
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static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
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{
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struct i2c_timings *t = &dev->timings;
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dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
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dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
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DW_IC_CON_RESTART_EN;
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dev->mode = DW_IC_MASTER;
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switch (t->bus_freq_hz) {
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case 100000:
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dev->master_cfg |= DW_IC_CON_SPEED_STD;
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break;
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case 3400000:
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dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
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break;
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default:
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dev->master_cfg |= DW_IC_CON_SPEED_FAST;
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}
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}
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static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
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{
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dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
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dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
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DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
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dev->mode = DW_IC_SLAVE;
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}
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static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
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{
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u32 param, tx_fifo_depth, rx_fifo_depth;
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/*
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* Try to detect the FIFO depth if not set by interface driver,
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* the depth could be from 2 to 256 from HW spec.
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*/
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param = i2c_dw_read_comp_param(dev);
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tx_fifo_depth = ((param >> 16) & 0xff) + 1;
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rx_fifo_depth = ((param >> 8) & 0xff) + 1;
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if (!dev->tx_fifo_depth) {
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dev->tx_fifo_depth = tx_fifo_depth;
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dev->rx_fifo_depth = rx_fifo_depth;
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dev->adapter.nr = id;
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} else if (tx_fifo_depth >= 2) {
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dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
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tx_fifo_depth);
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dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
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rx_fifo_depth);
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}
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}
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static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
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{
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pm_runtime_disable(dev->dev);
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if (dev->pm_disabled)
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pm_runtime_put_noidle(dev->dev);
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}
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static int dw_i2c_plat_probe(struct platform_device *pdev)
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{
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struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct i2c_adapter *adap;
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struct dw_i2c_dev *dev;
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struct i2c_timings *t;
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u32 acpi_speed;
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struct resource *mem;
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int i, irq, ret;
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static const int supported_speeds[] = {
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0, 100000, 400000, 1000000, 3400000
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};
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dev->base = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(dev->base))
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return PTR_ERR(dev->base);
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dev->dev = &pdev->dev;
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dev->irq = irq;
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platform_set_drvdata(pdev, dev);
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dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
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if (IS_ERR(dev->rst)) {
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if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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} else {
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reset_control_deassert(dev->rst);
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}
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t = &dev->timings;
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if (pdata)
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t->bus_freq_hz = pdata->i2c_scl_freq;
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else
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i2c_parse_fw_timings(&pdev->dev, t, false);
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acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
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/*
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* Some DSTDs use a non standard speed, round down to the lowest
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* standard speed.
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*/
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for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
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if (acpi_speed < supported_speeds[i])
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break;
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}
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acpi_speed = supported_speeds[i - 1];
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/*
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* Find bus speed from the "clock-frequency" device property, ACPI
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* or by using fast mode if neither is set.
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*/
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if (acpi_speed && t->bus_freq_hz)
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t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
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else if (acpi_speed || t->bus_freq_hz)
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t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
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else
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t->bus_freq_hz = 400000;
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if (has_acpi_companion(&pdev->dev))
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dw_i2c_acpi_configure(pdev);
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/*
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* Only standard mode at 100kHz, fast mode at 400kHz,
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* fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
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*/
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if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
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t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
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dev_err(&pdev->dev,
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"%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
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t->bus_freq_hz);
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ret = -EINVAL;
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goto exit_reset;
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}
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ret = i2c_dw_probe_lock_support(dev);
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if (ret)
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goto exit_reset;
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if (i2c_detect_slave_mode(&pdev->dev))
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i2c_dw_configure_slave(dev);
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else
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i2c_dw_configure_master(dev);
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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if (!i2c_dw_prepare_clk(dev, true)) {
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u64 clk_khz;
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dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
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clk_khz = dev->get_clk_rate_khz(dev);
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if (!dev->sda_hold_time && t->sda_hold_ns)
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dev->sda_hold_time =
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div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
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}
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dw_i2c_set_fifo_size(dev, pdev->id);
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adap = &dev->adapter;
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adap->owner = THIS_MODULE;
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adap->class = I2C_CLASS_DEPRECATED;
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ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
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adap->dev.of_node = pdev->dev.of_node;
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dev_pm_set_driver_flags(&pdev->dev,
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DPM_FLAG_SMART_PREPARE |
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DPM_FLAG_SMART_SUSPEND |
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DPM_FLAG_LEAVE_SUSPENDED);
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/* The code below assumes runtime PM to be disabled. */
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WARN_ON(pm_runtime_enabled(&pdev->dev));
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pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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if (dev->pm_disabled)
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pm_runtime_get_noresume(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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if (dev->mode == DW_IC_SLAVE)
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ret = i2c_dw_probe_slave(dev);
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else
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ret = i2c_dw_probe(dev);
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if (ret)
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goto exit_probe;
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return ret;
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exit_probe:
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dw_i2c_plat_pm_cleanup(dev);
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exit_reset:
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if (!IS_ERR_OR_NULL(dev->rst))
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reset_control_assert(dev->rst);
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return ret;
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}
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static int dw_i2c_plat_remove(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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pm_runtime_get_sync(&pdev->dev);
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i2c_del_adapter(&dev->adapter);
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dev->disable(dev);
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pm_runtime_dont_use_autosuspend(&pdev->dev);
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pm_runtime_put_sync(&pdev->dev);
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dw_i2c_plat_pm_cleanup(dev);
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if (!IS_ERR_OR_NULL(dev->rst))
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reset_control_assert(dev->rst);
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i2c_dw_remove_lock_support(dev);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id dw_i2c_of_match[] = {
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{ .compatible = "snps,designware-i2c", },
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{},
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};
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MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
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#endif
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#ifdef CONFIG_PM_SLEEP
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static int dw_i2c_plat_prepare(struct device *dev)
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{
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/*
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* If the ACPI companion device object is present for this device, it
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* may be accessed during suspend and resume of other devices via I2C
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* operation regions, so tell the PM core and middle layers to avoid
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* skipping system suspend/resume callbacks for it in that case.
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*/
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return !has_acpi_companion(dev);
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}
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static void dw_i2c_plat_complete(struct device *dev)
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{
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/*
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* The device can only be in runtime suspend at this point if it has not
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* been resumed throughout the ending system suspend/resume cycle, so if
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* the platform firmware might mess up with it, request the runtime PM
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* framework to resume it.
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*/
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if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
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pm_request_resume(dev);
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}
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#else
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#define dw_i2c_plat_prepare NULL
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#define dw_i2c_plat_complete NULL
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#endif
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|
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#ifdef CONFIG_PM
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static int dw_i2c_plat_suspend(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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|
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if (i_dev->pm_disabled)
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return 0;
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|
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i_dev->disable(i_dev);
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i2c_dw_prepare_clk(i_dev, false);
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|
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return 0;
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}
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|
|
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static int dw_i2c_plat_resume(struct device *dev)
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|
{
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|
struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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|
|
|
if (!i_dev->pm_disabled)
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i2c_dw_prepare_clk(i_dev, true);
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|
|
|
i_dev->init(i_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
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.prepare = dw_i2c_plat_prepare,
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|
.complete = dw_i2c_plat_complete,
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SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
|
|
SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
|
|
};
|
|
|
|
#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
|
|
#else
|
|
#define DW_I2C_DEV_PMOPS NULL
|
|
#endif
|
|
|
|
/* Work with hotplug and coldplug */
|
|
MODULE_ALIAS("platform:i2c_designware");
|
|
|
|
static struct platform_driver dw_i2c_driver = {
|
|
.probe = dw_i2c_plat_probe,
|
|
.remove = dw_i2c_plat_remove,
|
|
.driver = {
|
|
.name = "i2c_designware",
|
|
.of_match_table = of_match_ptr(dw_i2c_of_match),
|
|
.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
|
|
.pm = DW_I2C_DEV_PMOPS,
|
|
},
|
|
};
|
|
|
|
static int __init dw_i2c_init_driver(void)
|
|
{
|
|
return platform_driver_register(&dw_i2c_driver);
|
|
}
|
|
subsys_initcall(dw_i2c_init_driver);
|
|
|
|
static void __exit dw_i2c_exit_driver(void)
|
|
{
|
|
platform_driver_unregister(&dw_i2c_driver);
|
|
}
|
|
module_exit(dw_i2c_exit_driver);
|
|
|
|
MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
|
MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
|
|
MODULE_LICENSE("GPL");
|