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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7e3e68bcfd
Instead of using the DTV properties cache directly, pass the get frontend data as an argument. For now, everything should remain the same, but the next patch will prevent get_frontend to affect the global cache. This is needed because several drivers don't care enough to only change the properties if locked. Due to that, calling G_PROPERTY before locking on those drivers will make them to never lock. Ok, those drivers are crap and should never be merged like that, but the core should not rely that the drivers would be doing the right thing. Reviewed-by: Michael Ira Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
345 lines
7.3 KiB
C
345 lines
7.3 KiB
C
/*
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* Sony CXD2820R demodulator driver
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*
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* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "cxd2820r_priv.h"
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int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret, i;
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u8 buf[2];
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u32 if_freq;
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u16 if_ctl;
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u64 num;
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struct reg_val_mask tab[] = {
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{ 0x00080, 0x01, 0xff },
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{ 0x00081, 0x05, 0xff },
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{ 0x00085, 0x07, 0xff },
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{ 0x00088, 0x01, 0xff },
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{ 0x00082, 0x20, 0x60 },
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{ 0x1016a, 0x48, 0xff },
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{ 0x100a5, 0x00, 0x01 },
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{ 0x10020, 0x06, 0x07 },
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{ 0x10059, 0x50, 0xff },
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{ 0x10087, 0x0c, 0x3c },
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{ 0x1008b, 0x07, 0xff },
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{ 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 },
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{ 0x10070, priv->cfg.ts_mode, 0xff },
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{ 0x10071, !priv->cfg.ts_clock_inv << 4, 0x10 },
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};
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dev_dbg(&priv->i2c->dev, "%s: frequency=%d symbol_rate=%d\n", __func__,
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c->frequency, c->symbol_rate);
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/* program tuner */
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if (fe->ops.tuner_ops.set_params)
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fe->ops.tuner_ops.set_params(fe);
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if (priv->delivery_system != SYS_DVBC_ANNEX_A) {
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for (i = 0; i < ARRAY_SIZE(tab); i++) {
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ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
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tab[i].val, tab[i].mask);
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if (ret)
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goto error;
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}
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}
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priv->delivery_system = SYS_DVBC_ANNEX_A;
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priv->ber_running = false; /* tune stops BER counter */
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/* program IF frequency */
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if (fe->ops.tuner_ops.get_if_frequency) {
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ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
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if (ret)
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goto error;
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} else
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if_freq = 0;
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dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);
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num = if_freq / 1000; /* Hz => kHz */
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num *= 0x4000;
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if_ctl = 0x4000 - DIV_ROUND_CLOSEST_ULL(num, 41000);
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buf[0] = (if_ctl >> 8) & 0x3f;
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buf[1] = (if_ctl >> 0) & 0xff;
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ret = cxd2820r_wr_regs(priv, 0x10042, buf, 2);
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if (ret)
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goto error;
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ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
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if (ret)
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goto error;
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ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
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if (ret)
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goto error;
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_get_frontend_c(struct dvb_frontend *fe,
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struct dtv_frontend_properties *c)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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u8 buf[2];
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ret = cxd2820r_rd_regs(priv, 0x1001a, buf, 2);
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if (ret)
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goto error;
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c->symbol_rate = 2500 * ((buf[0] & 0x0f) << 8 | buf[1]);
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ret = cxd2820r_rd_reg(priv, 0x10019, &buf[0]);
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if (ret)
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goto error;
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switch ((buf[0] >> 0) & 0x07) {
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case 0:
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c->modulation = QAM_16;
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break;
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case 1:
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c->modulation = QAM_32;
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break;
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case 2:
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c->modulation = QAM_64;
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break;
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case 3:
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c->modulation = QAM_128;
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break;
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case 4:
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c->modulation = QAM_256;
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break;
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}
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switch ((buf[0] >> 7) & 0x01) {
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case 0:
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c->inversion = INVERSION_OFF;
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break;
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case 1:
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c->inversion = INVERSION_ON;
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break;
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}
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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u8 buf[3], start_ber = 0;
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*ber = 0;
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if (priv->ber_running) {
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ret = cxd2820r_rd_regs(priv, 0x10076, buf, sizeof(buf));
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if (ret)
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goto error;
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if ((buf[2] >> 7) & 0x01 || (buf[2] >> 4) & 0x01) {
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*ber = (buf[2] & 0x0f) << 16 | buf[1] << 8 | buf[0];
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start_ber = 1;
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}
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} else {
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priv->ber_running = true;
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start_ber = 1;
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}
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if (start_ber) {
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/* (re)start BER */
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ret = cxd2820r_wr_reg(priv, 0x10079, 0x01);
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if (ret)
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goto error;
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}
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_read_signal_strength_c(struct dvb_frontend *fe,
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u16 *strength)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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u8 buf[2];
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u16 tmp;
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ret = cxd2820r_rd_regs(priv, 0x10049, buf, sizeof(buf));
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if (ret)
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goto error;
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tmp = (buf[0] & 0x03) << 8 | buf[1];
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tmp = (~tmp & 0x03ff);
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if (tmp == 512)
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/* ~no signal */
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tmp = 0;
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else if (tmp > 350)
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tmp = 350;
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/* scale value to 0x0000-0xffff */
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*strength = tmp * 0xffff / (350-0);
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_read_snr_c(struct dvb_frontend *fe, u16 *snr)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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u8 tmp;
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unsigned int A, B;
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/* report SNR in dB * 10 */
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ret = cxd2820r_rd_reg(priv, 0x10019, &tmp);
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if (ret)
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goto error;
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if (((tmp >> 0) & 0x03) % 2) {
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A = 875;
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B = 650;
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} else {
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A = 950;
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B = 760;
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}
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ret = cxd2820r_rd_reg(priv, 0x1004d, &tmp);
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if (ret)
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goto error;
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#define CXD2820R_LOG2_E_24 24204406 /* log2(e) << 24 */
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if (tmp)
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*snr = A * (intlog2(B / tmp) >> 5) / (CXD2820R_LOG2_E_24 >> 5)
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/ 10;
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else
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*snr = 0;
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_read_ucblocks_c(struct dvb_frontend *fe, u32 *ucblocks)
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{
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*ucblocks = 0;
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/* no way to read ? */
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return 0;
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}
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int cxd2820r_read_status_c(struct dvb_frontend *fe, enum fe_status *status)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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u8 buf[2];
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*status = 0;
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ret = cxd2820r_rd_regs(priv, 0x10088, buf, sizeof(buf));
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if (ret)
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goto error;
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if (((buf[0] >> 0) & 0x01) == 1) {
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*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI | FE_HAS_SYNC;
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if (((buf[1] >> 3) & 0x01) == 1) {
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*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
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}
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}
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dev_dbg(&priv->i2c->dev, "%s: lock=%02x %02x\n", __func__, buf[0],
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buf[1]);
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_init_c(struct dvb_frontend *fe)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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ret = cxd2820r_wr_reg(priv, 0x00085, 0x07);
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if (ret)
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goto error;
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_sleep_c(struct dvb_frontend *fe)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret, i;
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struct reg_val_mask tab[] = {
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{ 0x000ff, 0x1f, 0xff },
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{ 0x00085, 0x00, 0xff },
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{ 0x00088, 0x01, 0xff },
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{ 0x00081, 0x00, 0xff },
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{ 0x00080, 0x00, 0xff },
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};
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dev_dbg(&priv->i2c->dev, "%s\n", __func__);
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priv->delivery_system = SYS_UNDEFINED;
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for (i = 0; i < ARRAY_SIZE(tab); i++) {
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ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
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tab[i].mask);
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if (ret)
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goto error;
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}
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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int cxd2820r_get_tune_settings_c(struct dvb_frontend *fe,
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struct dvb_frontend_tune_settings *s)
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{
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s->min_delay_ms = 500;
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s->step_size = 0; /* no zigzag */
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s->max_drift = 0;
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return 0;
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}
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