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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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acc207616a
i386 port of the sLeAZY-fpu feature. Chuck reports that this gives him a +/- 0.4% improvement on his simple benchmark x86_64 description follows: Right now the kernel on x86-64 has a 100% lazy fpu behavior: after *every* context switch a trap is taken for the first FPU use to restore the FPU context lazily. This is of course great for applications that have very sporadic or no FPU use (since then you avoid doing the expensive save/restore all the time). However for very frequent FPU users... you take an extra trap every context switch. The patch below adds a simple heuristic to this code: After 5 consecutive context switches of FPU use, the lazy behavior is disabled and the context gets restored every context switch. If the app indeed uses the FPU, the trap is avoided. (the chance of the 6th time slice using FPU after the previous 5 having done so are quite high obviously). After 256 switches, this is reset and lazy behavior is returned (until there are 5 consecutive ones again). The reason for this is to give apps that do longer bursts of FPU use still the lazy behavior back after some time. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
151 lines
3.8 KiB
C
151 lines
3.8 KiB
C
/*
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* include/asm-i386/i387.h
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*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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#ifndef __ASM_I386_I387_H
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#define __ASM_I386_I387_H
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <asm/processor.h>
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#include <asm/sigcontext.h>
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#include <asm/user.h>
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extern void mxcsr_feature_mask_init(void);
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extern void init_fpu(struct task_struct *);
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/*
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* FPU lazy state save handling...
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*/
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/*
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* The "nop" is needed to make the instructions the same
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* length.
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*/
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#define restore_fpu(tsk) \
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alternative_input( \
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"nop ; frstor %1", \
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"fxrstor %1", \
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X86_FEATURE_FXSR, \
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"m" ((tsk)->thread.i387.fxsave))
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extern void kernel_fpu_begin(void);
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#define kernel_fpu_end() do { stts(); preempt_enable(); } while(0)
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/* We need a safe address that is cheap to find and that is already
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in L1 during context switch. The best choices are unfortunately
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different for UP and SMP */
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#ifdef CONFIG_SMP
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#define safe_address (__per_cpu_offset[0])
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#else
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#define safe_address (kstat_cpu(0).cpustat.user)
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#endif
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/*
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* These must be called with preempt disabled
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*/
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static inline void __save_init_fpu( struct task_struct *tsk )
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{
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/* Use more nops than strictly needed in case the compiler
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varies code */
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alternative_input(
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"fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
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"fxsave %[fx]\n"
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"bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
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X86_FEATURE_FXSR,
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[fx] "m" (tsk->thread.i387.fxsave),
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[fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
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/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
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is pending. Clear the x87 state here by setting it to fixed
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values. safe_address is a random variable that should be in L1 */
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alternative_input(
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GENERIC_NOP8 GENERIC_NOP2,
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"emms\n\t" /* clear stack tags */
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"fildl %[addr]", /* set F?P to defined value */
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X86_FEATURE_FXSAVE_LEAK,
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[addr] "m" (safe_address));
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task_thread_info(tsk)->status &= ~TS_USEDFPU;
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}
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#define __unlazy_fpu( tsk ) do { \
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if (task_thread_info(tsk)->status & TS_USEDFPU) \
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save_init_fpu( tsk ); \
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else \
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tsk->fpu_counter = 0; \
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} while (0)
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#define __clear_fpu( tsk ) \
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do { \
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if (task_thread_info(tsk)->status & TS_USEDFPU) { \
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asm volatile("fnclex ; fwait"); \
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task_thread_info(tsk)->status &= ~TS_USEDFPU; \
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stts(); \
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} \
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} while (0)
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/*
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* These disable preemption on their own and are safe
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*/
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static inline void save_init_fpu( struct task_struct *tsk )
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{
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preempt_disable();
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__save_init_fpu(tsk);
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stts();
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preempt_enable();
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}
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#define unlazy_fpu( tsk ) do { \
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preempt_disable(); \
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__unlazy_fpu(tsk); \
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preempt_enable(); \
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} while (0)
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#define clear_fpu( tsk ) do { \
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preempt_disable(); \
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__clear_fpu( tsk ); \
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preempt_enable(); \
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} while (0)
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\
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/*
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* FPU state interaction...
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*/
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extern unsigned short get_fpu_cwd( struct task_struct *tsk );
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extern unsigned short get_fpu_swd( struct task_struct *tsk );
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extern unsigned short get_fpu_mxcsr( struct task_struct *tsk );
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extern asmlinkage void math_state_restore(void);
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/*
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* Signal frame handlers...
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*/
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extern int save_i387( struct _fpstate __user *buf );
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extern int restore_i387( struct _fpstate __user *buf );
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/*
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* ptrace request handers...
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*/
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extern int get_fpregs( struct user_i387_struct __user *buf,
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struct task_struct *tsk );
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extern int set_fpregs( struct task_struct *tsk,
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struct user_i387_struct __user *buf );
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extern int get_fpxregs( struct user_fxsr_struct __user *buf,
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struct task_struct *tsk );
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extern int set_fpxregs( struct task_struct *tsk,
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struct user_fxsr_struct __user *buf );
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/*
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* FPU state for core dumps...
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*/
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extern int dump_fpu( struct pt_regs *regs,
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struct user_i387_struct *fpu );
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#endif /* __ASM_I386_I387_H */
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