mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 14:44:31 +07:00
bd5717a463
msb of the regmap_field was mistakenly given the value 32, to set all bits
in the regmap update mask; although incorrect this worked until 921cc294
,
where the mask calculation was corrected.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
182 lines
4.4 KiB
C
182 lines
4.4 KiB
C
/*
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* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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* Copyright (c) 2015, Sony Mobile Communications AB
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/hwspinlock.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include "hwspinlock_internal.h"
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#define QCOM_MUTEX_APPS_PROC_ID 1
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#define QCOM_MUTEX_NUM_LOCKS 32
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static int qcom_hwspinlock_trylock(struct hwspinlock *lock)
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{
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struct regmap_field *field = lock->priv;
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u32 lock_owner;
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int ret;
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ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
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if (ret)
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return ret;
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ret = regmap_field_read(field, &lock_owner);
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if (ret)
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return ret;
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return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
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}
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static void qcom_hwspinlock_unlock(struct hwspinlock *lock)
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{
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struct regmap_field *field = lock->priv;
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u32 lock_owner;
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int ret;
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ret = regmap_field_read(field, &lock_owner);
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if (ret) {
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pr_err("%s: unable to query spinlock owner\n", __func__);
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return;
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}
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if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) {
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pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
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__func__, lock_owner);
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}
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ret = regmap_field_write(field, 0);
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if (ret)
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pr_err("%s: failed to unlock spinlock\n", __func__);
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}
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static const struct hwspinlock_ops qcom_hwspinlock_ops = {
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.trylock = qcom_hwspinlock_trylock,
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.unlock = qcom_hwspinlock_unlock,
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};
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static const struct of_device_id qcom_hwspinlock_of_match[] = {
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{ .compatible = "qcom,sfpb-mutex" },
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{ .compatible = "qcom,tcsr-mutex" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
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static int qcom_hwspinlock_probe(struct platform_device *pdev)
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{
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struct hwspinlock_device *bank;
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struct device_node *syscon;
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struct reg_field field;
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struct regmap *regmap;
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size_t array_size;
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u32 stride;
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u32 base;
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int ret;
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int i;
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syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
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if (!syscon) {
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dev_err(&pdev->dev, "no syscon property\n");
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return -ENODEV;
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}
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regmap = syscon_node_to_regmap(syscon);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, &base);
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if (ret < 0) {
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dev_err(&pdev->dev, "no offset in syscon\n");
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return -EINVAL;
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}
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ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, &stride);
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if (ret < 0) {
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dev_err(&pdev->dev, "no stride syscon\n");
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return -EINVAL;
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}
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array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
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bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
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if (!bank)
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return -ENOMEM;
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platform_set_drvdata(pdev, bank);
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for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) {
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field.reg = base + i * stride;
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field.lsb = 0;
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field.msb = 31;
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bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev,
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regmap, field);
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}
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pm_runtime_enable(&pdev->dev);
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ret = hwspin_lock_register(bank, &pdev->dev, &qcom_hwspinlock_ops,
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0, QCOM_MUTEX_NUM_LOCKS);
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if (ret)
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pm_runtime_disable(&pdev->dev);
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return ret;
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}
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static int qcom_hwspinlock_remove(struct platform_device *pdev)
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{
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struct hwspinlock_device *bank = platform_get_drvdata(pdev);
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int ret;
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ret = hwspin_lock_unregister(bank);
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if (ret) {
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dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
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return ret;
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}
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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static struct platform_driver qcom_hwspinlock_driver = {
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.probe = qcom_hwspinlock_probe,
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.remove = qcom_hwspinlock_remove,
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.driver = {
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.name = "qcom_hwspinlock",
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.of_match_table = qcom_hwspinlock_of_match,
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},
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};
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static int __init qcom_hwspinlock_init(void)
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{
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return platform_driver_register(&qcom_hwspinlock_driver);
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}
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/* board init code might need to reserve hwspinlocks for predefined purposes */
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postcore_initcall(qcom_hwspinlock_init);
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static void __exit qcom_hwspinlock_exit(void)
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{
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platform_driver_unregister(&qcom_hwspinlock_driver);
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}
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module_exit(qcom_hwspinlock_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs");
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