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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a20db58f3e
Both init functions have a stray "return NULL" at the end which is never reached so drop them. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20191119125837.47619-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
238 lines
5.3 KiB
C
238 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Register map access API - W1 (1-Wire) support
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//
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// Copyright (c) 2017 Radioavionica Corporation
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// Author: Alex A. Mihaylov <minimumlaw@rambler.ru>
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#include <linux/regmap.h>
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#include <linux/module.h>
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#include <linux/w1.h>
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#include "internal.h"
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#define W1_CMD_READ_DATA 0x69
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#define W1_CMD_WRITE_DATA 0x6C
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/*
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* 1-Wire slaves registers with addess 8 bit and data 8 bit
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*/
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static int w1_reg_a8_v8_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_READ_DATA);
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w1_write_8(sl->master, reg);
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*val = w1_read_8(sl->master);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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static int w1_reg_a8_v8_write(void *context, unsigned int reg, unsigned int val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_WRITE_DATA);
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w1_write_8(sl->master, reg);
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w1_write_8(sl->master, val);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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/*
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* 1-Wire slaves registers with addess 8 bit and data 16 bit
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*/
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static int w1_reg_a8_v16_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_READ_DATA);
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w1_write_8(sl->master, reg);
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*val = w1_read_8(sl->master);
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*val |= w1_read_8(sl->master)<<8;
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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static int w1_reg_a8_v16_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 255)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_WRITE_DATA);
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w1_write_8(sl->master, reg);
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w1_write_8(sl->master, val & 0x00FF);
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w1_write_8(sl->master, val>>8 & 0x00FF);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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/*
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* 1-Wire slaves registers with addess 16 bit and data 16 bit
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*/
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static int w1_reg_a16_v16_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 65535)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_READ_DATA);
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w1_write_8(sl->master, reg & 0x00FF);
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w1_write_8(sl->master, reg>>8 & 0x00FF);
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*val = w1_read_8(sl->master);
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*val |= w1_read_8(sl->master)<<8;
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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static int w1_reg_a16_v16_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct device *dev = context;
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struct w1_slave *sl = container_of(dev, struct w1_slave, dev);
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int ret = 0;
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if (reg > 65535)
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return -EINVAL;
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mutex_lock(&sl->master->bus_mutex);
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if (!w1_reset_select_slave(sl)) {
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w1_write_8(sl->master, W1_CMD_WRITE_DATA);
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w1_write_8(sl->master, reg & 0x00FF);
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w1_write_8(sl->master, reg>>8 & 0x00FF);
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w1_write_8(sl->master, val & 0x00FF);
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w1_write_8(sl->master, val>>8 & 0x00FF);
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} else {
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ret = -ENODEV;
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}
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mutex_unlock(&sl->master->bus_mutex);
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return ret;
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}
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/*
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* Various types of supported bus addressing
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*/
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static struct regmap_bus regmap_w1_bus_a8_v8 = {
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.reg_read = w1_reg_a8_v8_read,
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.reg_write = w1_reg_a8_v8_write,
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};
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static struct regmap_bus regmap_w1_bus_a8_v16 = {
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.reg_read = w1_reg_a8_v16_read,
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.reg_write = w1_reg_a8_v16_write,
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};
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static struct regmap_bus regmap_w1_bus_a16_v16 = {
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.reg_read = w1_reg_a16_v16_read,
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.reg_write = w1_reg_a16_v16_write,
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};
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static const struct regmap_bus *regmap_get_w1_bus(struct device *w1_dev,
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const struct regmap_config *config)
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{
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if (config->reg_bits == 8 && config->val_bits == 8)
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return ®map_w1_bus_a8_v8;
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if (config->reg_bits == 8 && config->val_bits == 16)
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return ®map_w1_bus_a8_v16;
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if (config->reg_bits == 16 && config->val_bits == 16)
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return ®map_w1_bus_a16_v16;
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return ERR_PTR(-ENOTSUPP);
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}
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struct regmap *__regmap_init_w1(struct device *w1_dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_w1_bus(w1_dev, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __regmap_init(w1_dev, bus, w1_dev, config,
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lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__regmap_init_w1);
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struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
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const struct regmap_config *config,
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struct lock_class_key *lock_key,
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const char *lock_name)
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{
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const struct regmap_bus *bus = regmap_get_w1_bus(w1_dev, config);
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if (IS_ERR(bus))
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return ERR_CAST(bus);
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return __devm_regmap_init(w1_dev, bus, w1_dev, config,
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lock_key, lock_name);
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}
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EXPORT_SYMBOL_GPL(__devm_regmap_init_w1);
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MODULE_LICENSE("GPL");
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