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e3850ecfc1
The stcctm5 inline assembly uses a variable length array to specify the memory that is written to. According to the gcc manual this trick only works if the length is known at compile time. This is not the the case for the stccm5 inline assembly. Therefore simply use a full memory clobber. As requested by Martin also move the output Q constraint operand to the input operands list, since all we want is that the compiler generates an instruction that may use the displacement field: in other words we only need the address of *val. That the inline assembly actually writes to an array starting at val is taken care of with the memory clobber. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
302 lines
8.7 KiB
C
302 lines
8.7 KiB
C
/*
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* CPU-measurement facilities
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*
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* Copyright IBM Corp. 2012
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* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License (version 2 only)
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* as published by the Free Software Foundation.
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*/
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#ifndef _ASM_S390_CPU_MF_H
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#define _ASM_S390_CPU_MF_H
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#include <linux/errno.h>
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#include <asm/facility.h>
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#define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
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#define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
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#define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
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#define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
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#define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
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#define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
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#define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
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#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
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#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
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CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
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CPU_MF_INT_SF_LSDA)
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/* CPU measurement facility support */
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static inline int cpum_cf_avail(void)
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{
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return MACHINE_HAS_LPP && test_facility(67);
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}
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static inline int cpum_sf_avail(void)
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{
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return MACHINE_HAS_LPP && test_facility(68);
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}
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struct cpumf_ctr_info {
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u16 cfvn;
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u16 auth_ctl;
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u16 enable_ctl;
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u16 act_ctl;
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u16 max_cpu;
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u16 csvn;
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u16 max_cg;
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u16 reserved1;
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u32 reserved2[12];
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} __packed;
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/* QUERY SAMPLING INFORMATION block */
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struct hws_qsi_info_block { /* Bit(s) */
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unsigned int b0_13:14; /* 0-13: zeros */
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unsigned int as:1; /* 14: basic-sampling authorization */
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unsigned int ad:1; /* 15: diag-sampling authorization */
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unsigned int b16_21:6; /* 16-21: zeros */
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unsigned int es:1; /* 22: basic-sampling enable control */
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unsigned int ed:1; /* 23: diag-sampling enable control */
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unsigned int b24_29:6; /* 24-29: zeros */
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unsigned int cs:1; /* 30: basic-sampling activation control */
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unsigned int cd:1; /* 31: diag-sampling activation control */
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unsigned int bsdes:16; /* 4-5: size of basic sampling entry */
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unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */
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unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
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unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
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unsigned long tear; /* 24-31: TEAR contents */
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unsigned long dear; /* 32-39: DEAR contents */
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unsigned int rsvrd0; /* 40-43: reserved */
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unsigned int cpu_speed; /* 44-47: CPU speed */
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unsigned long long rsvrd1; /* 48-55: reserved */
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unsigned long long rsvrd2; /* 56-63: reserved */
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} __packed;
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/* SET SAMPLING CONTROLS request block */
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struct hws_lsctl_request_block {
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unsigned int s:1; /* 0: maximum buffer indicator */
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unsigned int h:1; /* 1: part. level reserved for VM use*/
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unsigned long long b2_53:52;/* 2-53: zeros */
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unsigned int es:1; /* 54: basic-sampling enable control */
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unsigned int ed:1; /* 55: diag-sampling enable control */
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unsigned int b56_61:6; /* 56-61: - zeros */
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unsigned int cs:1; /* 62: basic-sampling activation control */
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unsigned int cd:1; /* 63: diag-sampling activation control */
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unsigned long interval; /* 8-15: sampling interval */
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unsigned long tear; /* 16-23: TEAR contents */
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unsigned long dear; /* 24-31: DEAR contents */
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/* 32-63: */
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unsigned long rsvrd1; /* reserved */
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unsigned long rsvrd2; /* reserved */
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unsigned long rsvrd3; /* reserved */
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unsigned long rsvrd4; /* reserved */
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} __packed;
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struct hws_basic_entry {
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unsigned int def:16; /* 0-15 Data Entry Format */
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unsigned int R:4; /* 16-19 reserved */
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unsigned int U:4; /* 20-23 Number of unique instruct. */
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unsigned int z:2; /* zeros */
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unsigned int T:1; /* 26 PSW DAT mode */
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unsigned int W:1; /* 27 PSW wait state */
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unsigned int P:1; /* 28 PSW Problem state */
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unsigned int AS:2; /* 29-30 PSW address-space control */
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unsigned int I:1; /* 31 entry valid or invalid */
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unsigned int CL:2; /* 32-33 Configuration Level */
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unsigned int:14;
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unsigned int prim_asn:16; /* primary ASN */
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unsigned long long ia; /* Instruction Address */
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unsigned long long gpp; /* Guest Program Parameter */
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unsigned long long hpp; /* Host Program Parameter */
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} __packed;
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struct hws_diag_entry {
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unsigned int def:16; /* 0-15 Data Entry Format */
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unsigned int R:14; /* 16-19 and 20-30 reserved */
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unsigned int I:1; /* 31 entry valid or invalid */
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u8 data[]; /* Machine-dependent sample data */
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} __packed;
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struct hws_combined_entry {
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struct hws_basic_entry basic; /* Basic-sampling data entry */
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struct hws_diag_entry diag; /* Diagnostic-sampling data entry */
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} __packed;
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struct hws_trailer_entry {
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union {
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struct {
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unsigned int f:1; /* 0 - Block Full Indicator */
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unsigned int a:1; /* 1 - Alert request control */
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unsigned int t:1; /* 2 - Timestamp format */
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unsigned long long:61; /* 3 - 63: Reserved */
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};
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unsigned long long flags; /* 0 - 63: All indicators */
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};
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unsigned long long overflow; /* 64 - sample Overflow count */
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unsigned char timestamp[16]; /* 16 - 31 timestamp */
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unsigned long long reserved1; /* 32 -Reserved */
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unsigned long long reserved2; /* */
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unsigned long long progusage1; /* 48 - reserved for programming use */
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unsigned long long progusage2; /* */
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} __packed;
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/* Query counter information */
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static inline int qctri(struct cpumf_ctr_info *info)
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{
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int rc = -EINVAL;
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asm volatile (
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"0: .insn s,0xb28e0000,%1\n"
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"1: lhi %0,0\n"
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"2:\n"
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EX_TABLE(1b, 2b)
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: "+d" (rc), "=Q" (*info));
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return rc;
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}
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/* Load CPU-counter-set controls */
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static inline int lcctl(u64 ctl)
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{
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int cc;
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asm volatile (
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" .insn s,0xb2840000,%1\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc) : "m" (ctl) : "cc");
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return cc;
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}
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/* Extract CPU counter */
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static inline int __ecctr(u64 ctr, u64 *content)
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{
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register u64 _content asm("4") = 0;
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int cc;
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asm volatile (
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" .insn rre,0xb2e40000,%0,%2\n"
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" ipm %1\n"
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" srl %1,28\n"
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: "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
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*content = _content;
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return cc;
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}
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/* Extract CPU counter */
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static inline int ecctr(u64 ctr, u64 *val)
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{
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u64 content;
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int cc;
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cc = __ecctr(ctr, &content);
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if (!cc)
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*val = content;
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return cc;
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}
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/* Store CPU counter multiple for the MT utilization counter set */
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static inline int stcctm5(u64 num, u64 *val)
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{
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int cc;
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asm volatile (
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" .insn rsy,0xeb0000000017,%2,5,%1\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc)
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: "Q" (*val), "d" (num)
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: "cc", "memory");
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return cc;
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}
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/* Query sampling information */
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static inline int qsi(struct hws_qsi_info_block *info)
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{
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int cc = 1;
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asm volatile(
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"0: .insn s,0xb2860000,%1\n"
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"1: lhi %0,0\n"
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"2:\n"
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EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
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: "+d" (cc), "+Q" (*info));
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return cc ? -EINVAL : 0;
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}
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/* Load sampling controls */
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static inline int lsctl(struct hws_lsctl_request_block *req)
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{
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int cc;
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cc = 1;
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asm volatile(
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"0: .insn s,0xb2870000,0(%1)\n"
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"1: ipm %0\n"
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" srl %0,28\n"
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"2:\n"
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EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
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: "+d" (cc), "+a" (req)
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: "m" (*req)
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: "cc", "memory");
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return cc ? -EINVAL : 0;
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}
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/* Sampling control helper functions */
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#include <linux/time.h>
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static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
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unsigned long freq)
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{
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return (USEC_PER_SEC / freq) * qsi->cpu_speed;
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}
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static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
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unsigned long rate)
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{
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return USEC_PER_SEC * qsi->cpu_speed / rate;
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}
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#define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL
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#define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
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/* Return TOD timestamp contained in an trailer entry */
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static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
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{
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/* TOD in STCKE format */
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if (te->t)
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return *((unsigned long long *) &te->timestamp[1]);
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/* TOD in STCK format */
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return *((unsigned long long *) &te->timestamp[0]);
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}
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/* Return pointer to trailer entry of an sample data block */
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static inline unsigned long *trailer_entry_ptr(unsigned long v)
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{
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void *ret;
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ret = (void *) v;
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ret += PAGE_SIZE;
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ret -= sizeof(struct hws_trailer_entry);
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return (unsigned long *) ret;
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}
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/* Return if the entry in the sample data block table (sdbt)
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* is a link to the next sdbt */
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static inline int is_link_entry(unsigned long *s)
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{
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return *s & 0x1ul ? 1 : 0;
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}
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/* Return pointer to the linked sdbt */
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static inline unsigned long *get_next_sdbt(unsigned long *s)
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{
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return (unsigned long *) (*s & ~0x1ul);
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}
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#endif /* _ASM_S390_CPU_MF_H */
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