Joseph Greathouse 18c6b74e7c drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for Arcturus ... In previous gfx9 parts, S_BARRIER shader instructions are implicitly S_WAITCNT 0 instructions as well. This setting turns off that mechanism in Arcturus and beyond. With this, shaders must follow the ISA guide insofar as putting in explicit S_WAITCNT operations even after an S_BARRIER. v2: Fix patch title to list component Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-01-30 17:15:27 -05:00
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asic_reg	drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for Arcturus	2020-01-30 17:15:27 -05:00
ivsrcid
amd_acpi.h
amd_pcie_helpers.h
amd_pcie.h
amd_shared.h	drm/amdgpu: add JPEG PG and CG interface	2019-11-19 10:12:50 -05:00
arct_ip_offset.h
atom-bits.h
atom-names.h
atom-types.h
atombios.h
atomfirmware.h	drm/amdgpu: update the method to get fb_loc of memory training(V4)	2019-12-23 14:59:20 -05:00
atomfirmwareid.h
cgs_common.h
cik_structs.h
discovery.h
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h	drm/amdkfd: use kiq to load the mqd of hiq queue for gfx v9 (v6)	2020-01-16 13:34:50 -05:00
kgd_pp_interface.h	drm/amd/powerplay: support xgmi pstate setting on powerplay routine V2	2019-11-06 16:27:46 -05:00
navi10_enum.h
navi10_ip_offset.h
navi12_ip_offset.h
navi14_ip_offset.h
pptable.h
renoir_ip_offset.h
soc15_hw_ip.h
soc15_ih_clientid.h
v9_structs.h
v10_structs.h
vega10_enum.h
vega10_ip_offset.h
vega20_ip_offset.h
vi_structs.h