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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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bbde310474
Use standard V4L2 control to get pixel clock rate from a sensor linked in the media controller pipeline. Then calculate clock rates on CSIPHY, CSID and VFE to use the lowest possible. If the currnet pixel clock rate of the sensor cannot be read then use the highest possible. This case covers also the CSID test generator usage. If VFE is already powered on by another pipeline, check that the current VFE clock rate is high enough for the new pipeline. If not return busy error code as VFE clock rate cannot be changed while VFE is running. Signed-off-by: Todor Tomov <todor.tomov@linaro.org> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/*
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* camss-csiphy.h
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*
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* Qualcomm MSM Camera Subsystem - CSIPHY Module
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*
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* Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
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* Copyright (C) 2016-2017 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef QC_MSM_CAMSS_CSIPHY_H
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#define QC_MSM_CAMSS_CSIPHY_H
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#include <linux/clk.h>
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#include <media/media-entity.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-mediabus.h>
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#include <media/v4l2-subdev.h>
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#define MSM_CSIPHY_PAD_SINK 0
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#define MSM_CSIPHY_PAD_SRC 1
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#define MSM_CSIPHY_PADS_NUM 2
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struct csiphy_lane {
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u8 pos;
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u8 pol;
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};
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struct csiphy_lanes_cfg {
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int num_data;
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struct csiphy_lane *data;
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struct csiphy_lane clk;
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};
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struct csiphy_csi2_cfg {
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struct csiphy_lanes_cfg lane_cfg;
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};
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struct csiphy_config {
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u8 combo_mode;
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u8 csid_id;
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struct csiphy_csi2_cfg *csi2;
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};
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struct csiphy_device {
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u8 id;
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struct v4l2_subdev subdev;
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struct media_pad pads[MSM_CSIPHY_PADS_NUM];
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void __iomem *base;
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void __iomem *base_clk_mux;
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u32 irq;
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char irq_name[30];
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struct camss_clock *clock;
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int nclocks;
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u32 timer_clk_rate;
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struct csiphy_config cfg;
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struct v4l2_mbus_framefmt fmt[MSM_CSIPHY_PADS_NUM];
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};
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struct resources;
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int msm_csiphy_subdev_init(struct csiphy_device *csiphy,
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const struct resources *res, u8 id);
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int msm_csiphy_register_entity(struct csiphy_device *csiphy,
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struct v4l2_device *v4l2_dev);
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void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
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#endif /* QC_MSM_CAMSS_CSIPHY_H */
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