linux_dsm_epyc7002/drivers/gpu/drm/amd
Wenjing Liu df8e34ac27 drm/amd/display: fix image corruption with ODM 2:1 DSC 2 slice
[why]
When combining two or more pipes in DSC mode, there will always be more
than 1 slice per line.  In this case, as per DSC rules, the sink device
is expecting that the ICH is reset at the end of each slice line (i.e.
ICH_RESET_AT_END_OF_LINE must be configured based on the number of
slices at the output of ODM).  It is recommended that software set
ICH_RESET_AT_END_OF_LINE = 0xF for each DSC in the ODM combine.  However
the current code only set ICH_RESET_AT_END_OF_LINE = 0xF when number of
slice per DSC engine is greater than 1 instead of number of slice per
output after ODM combine.

[how]
Add is_odm in dsc config. Set ICH_RESET_AT_END_OF_LINE = 0xF if either
is_odm or number of slice per DSC engine is greater than 1.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-03-05 00:29:57 -05:00
..
acp drm/amdgpu: fix license on Kconfig and Makefiles 2019-12-11 15:22:08 -05:00
amdgpu drm/amdgpu: Rearm IRQ in Navi10 SR-IOV if IRQ lost 2020-03-05 00:28:34 -05:00
amdkfd drm/amdkfd: fix indentation issue 2020-03-05 00:26:45 -05:00
display drm/amd/display: fix image corruption with ODM 2:1 DSC 2 slice 2020-03-05 00:29:57 -05:00
include drm/amdkfd: Make get_tile_config() generic 2020-02-28 16:59:20 -05:00
powerplay drm/amdgpu: Add debugfs interface to set arbitrary sclk for navi14 (v2) 2020-03-05 00:27:50 -05:00