Shiraz Saleem df8b13a1b2 i40iw: Fix sequence number for the first partial FPDU ... Partial FPDU processing is broken as the sequence number for the first partial FPDU is wrong due to incorrect Q2 buffer offset. The offset should be 64 rather than 16. Fixes: 786c6adb3a ("i40iw: add puda code") Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>		2017-12-22 13:39:20 -07:00
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core	IB/SA: Check dlid before SA agent queries for ClassPortInfo	2017-12-22 13:33:30 -07:00
hw	i40iw: Fix sequence number for the first partial FPDU	2017-12-22 13:39:20 -07:00
sw	IB/rxe: Avoid passing unused index pointer which is optional	2017-12-18 15:37:08 -07:00
ulp	iser-target: avoid reinitializing rdma contexts for isert commands	2017-12-18 16:12:18 -07:00
Kconfig	infiniband: add MMU dependency for user_mem	2017-10-10 10:49:44 -04:00
Makefile	IB/rdmavt: Create module framework and handle driver registration	2016-03-10 20:37:04 -05:00