linux_dsm_epyc7002/arch/riscv
Yash Shah df7e9059cf riscv: ccache: Remove unused variable
Reading the count register clears the interrupt signal. Currently, the
count registers are read into 'regval' variable but the variable is
never used. Therefore remove it. V2 of this patch add comments to
justify the readl calls without checking the return value.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-07-04 03:12:24 -07:00
..
boot arch: riscv: add config option for building SiFive's SoC resource 2019-07-01 13:15:36 -07:00
configs riscv: defconfig: enable SOC_SIFIVE 2019-07-01 13:20:05 -07:00
include riscv: Introduce huge page support for 32/64bit kernel 2019-07-03 15:23:38 -07:00
kernel riscv: Remove gate area stubs 2019-07-01 13:13:36 -07:00
lib RISC-V patches for v5.2-rc6 2019-06-17 10:34:03 -07:00
mm riscv: ccache: Remove unused variable 2019-07-04 03:12:24 -07:00
net Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf 2019-06-07 14:46:47 -07:00
Kconfig riscv: Introduce huge page support for 32/64bit kernel 2019-07-03 15:23:38 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.socs riscv: select SiFive platform drivers with SOC_SIFIVE 2019-07-01 13:20:01 -07:00
Makefile riscv: remove CONFIG_RISCV_ISA_A 2019-04-25 14:51:10 -07:00