mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 20:46:49 +07:00
defb05b9b9
No vlan support at this time. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: David S. Miller <davem@davemloft.net>
168 lines
5.4 KiB
C
168 lines
5.4 KiB
C
/*
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* net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __MV88E6XXX_H
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#define __MV88E6XXX_H
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#define REG_PORT(p) (0x10 + (p))
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#define REG_GLOBAL 0x1b
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#define REG_GLOBAL2 0x1c
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/* ATU commands */
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#define ATU_BUSY 0x8000
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#define ATU_CMD_LOAD_FID (ATU_BUSY | 0x3000)
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#define ATU_CMD_GETNEXT_FID (ATU_BUSY | 0x4000)
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#define ATU_CMD_FLUSH_NONSTATIC_FID (ATU_BUSY | 0x6000)
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/* port states */
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#define PSTATE_MASK 0x03
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#define PSTATE_DISABLED 0x00
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#define PSTATE_BLOCKING 0x01
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#define PSTATE_LEARNING 0x02
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#define PSTATE_FORWARDING 0x03
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/* FDB states */
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#define FDB_STATE_MASK 0x0f
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#define FDB_STATE_UNUSED 0x00
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#define FDB_STATE_MC_STATIC 0x07 /* static multicast */
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#define FDB_STATE_STATIC 0x0e /* static unicast */
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struct mv88e6xxx_priv_state {
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/* When using multi-chip addressing, this mutex protects
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* access to the indirect access registers. (In single-chip
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* mode, this mutex is effectively useless.)
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*/
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struct mutex smi_mutex;
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#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
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/* Handles automatic disabling and re-enabling of the PHY
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* polling unit.
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*/
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struct mutex ppu_mutex;
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int ppu_disabled;
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struct work_struct ppu_work;
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struct timer_list ppu_timer;
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#endif
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/* This mutex serialises access to the statistics unit.
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* Hold this mutex over snapshot + dump sequences.
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*/
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struct mutex stats_mutex;
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/* This mutex serializes phy access for chips with
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* indirect phy addressing. It is unused for chips
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* with direct phy access.
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*/
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struct mutex phy_mutex;
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/* This mutex serializes eeprom access for chips with
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* eeprom support.
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*/
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struct mutex eeprom_mutex;
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int id; /* switch product id */
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/* hw bridging */
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u32 fid_mask;
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u8 fid[DSA_MAX_PORTS];
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u16 bridge_mask[DSA_MAX_PORTS];
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unsigned long port_state_update_mask;
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u8 port_state[DSA_MAX_PORTS];
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struct work_struct bridge_work;
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};
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struct mv88e6xxx_hw_stat {
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char string[ETH_GSTRING_LEN];
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int sizeof_stat;
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int reg;
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};
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int mv88e6xxx_setup_port_common(struct dsa_switch *ds, int port);
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int mv88e6xxx_setup_common(struct dsa_switch *ds);
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int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
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int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
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int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
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int reg, u16 val);
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int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
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int mv88e6xxx_config_prio(struct dsa_switch *ds);
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int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
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int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
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int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
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void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
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int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
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int regnum, u16 val);
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void mv88e6xxx_poll_link(struct dsa_switch *ds);
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void mv88e6xxx_get_strings(struct dsa_switch *ds,
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int nr_stats, struct mv88e6xxx_hw_stat *stats,
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int port, uint8_t *data);
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void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
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int nr_stats, struct mv88e6xxx_hw_stat *stats,
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int port, uint64_t *data);
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int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port);
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void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
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struct ethtool_regs *regs, void *_p);
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int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);
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int mv88e6xxx_phy_wait(struct dsa_switch *ds);
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int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds);
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int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds);
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int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
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u16 val);
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int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e);
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int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
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struct phy_device *phydev, struct ethtool_eee *e);
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int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
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int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
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int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state);
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int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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int mv88e6xxx_port_fdb_getnext(struct dsa_switch *ds, int port,
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unsigned char *addr, bool *is_static);
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extern struct dsa_switch_driver mv88e6131_switch_driver;
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extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
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extern struct dsa_switch_driver mv88e6352_switch_driver;
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extern struct dsa_switch_driver mv88e6171_switch_driver;
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#define REG_READ(addr, reg) \
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({ \
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int __ret; \
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\
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__ret = mv88e6xxx_reg_read(ds, addr, reg); \
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if (__ret < 0) \
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return __ret; \
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__ret; \
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})
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#define REG_WRITE(addr, reg, val) \
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({ \
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int __ret; \
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\
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__ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
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if (__ret < 0) \
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return __ret; \
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})
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#endif
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