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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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00c4da27a4
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
135 lines
4.4 KiB
C
135 lines
4.4 KiB
C
/*
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* Atheros CARL9170 driver
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*
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* debug header
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*
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* Copyright 2010, Christian Lamparter <chunkeey@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, see
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* http://www.gnu.org/licenses/.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* Copyright (c) 2007-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __DEBUG_H
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#define __DEBUG_H
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#include "eeprom.h"
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#include "wlan.h"
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#include "hw.h"
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#include "fwdesc.h"
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#include "fwcmd.h"
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#include "../regd.h"
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struct hw_stat_reg_entry {
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u32 reg;
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char nreg[32];
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};
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#define STAT_MAC_REG(reg) \
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{ (AR9170_MAC_REG_##reg), #reg }
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#define STAT_PTA_REG(reg) \
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{ (AR9170_PTA_REG_##reg), #reg }
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#define STAT_USB_REG(reg) \
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{ (AR9170_USB_REG_##reg), #reg }
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static const struct hw_stat_reg_entry hw_rx_tally_regs[] = {
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STAT_MAC_REG(RX_CRC32), STAT_MAC_REG(RX_CRC16),
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STAT_MAC_REG(RX_TIMEOUT_COUNT), STAT_MAC_REG(RX_ERR_DECRYPTION_UNI),
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STAT_MAC_REG(RX_ERR_DECRYPTION_MUL), STAT_MAC_REG(RX_MPDU),
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STAT_MAC_REG(RX_DROPPED_MPDU), STAT_MAC_REG(RX_DEL_MPDU),
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};
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static const struct hw_stat_reg_entry hw_phy_errors_regs[] = {
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STAT_MAC_REG(RX_PHY_MISC_ERROR), STAT_MAC_REG(RX_PHY_XR_ERROR),
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STAT_MAC_REG(RX_PHY_OFDM_ERROR), STAT_MAC_REG(RX_PHY_CCK_ERROR),
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STAT_MAC_REG(RX_PHY_HT_ERROR), STAT_MAC_REG(RX_PHY_TOTAL),
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};
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static const struct hw_stat_reg_entry hw_tx_tally_regs[] = {
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STAT_MAC_REG(TX_TOTAL), STAT_MAC_REG(TX_UNDERRUN),
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STAT_MAC_REG(TX_RETRY),
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};
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static const struct hw_stat_reg_entry hw_wlan_queue_regs[] = {
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STAT_MAC_REG(DMA_STATUS), STAT_MAC_REG(DMA_TRIGGER),
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STAT_MAC_REG(DMA_TXQ0_ADDR), STAT_MAC_REG(DMA_TXQ0_CURR_ADDR),
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STAT_MAC_REG(DMA_TXQ1_ADDR), STAT_MAC_REG(DMA_TXQ1_CURR_ADDR),
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STAT_MAC_REG(DMA_TXQ2_ADDR), STAT_MAC_REG(DMA_TXQ2_CURR_ADDR),
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STAT_MAC_REG(DMA_TXQ3_ADDR), STAT_MAC_REG(DMA_TXQ3_CURR_ADDR),
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STAT_MAC_REG(DMA_RXQ_ADDR), STAT_MAC_REG(DMA_RXQ_CURR_ADDR),
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};
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static const struct hw_stat_reg_entry hw_ampdu_info_regs[] = {
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STAT_MAC_REG(AMPDU_DENSITY), STAT_MAC_REG(AMPDU_FACTOR),
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};
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static const struct hw_stat_reg_entry hw_pta_queue_regs[] = {
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STAT_PTA_REG(DN_CURR_ADDRH), STAT_PTA_REG(DN_CURR_ADDRL),
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STAT_PTA_REG(UP_CURR_ADDRH), STAT_PTA_REG(UP_CURR_ADDRL),
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STAT_PTA_REG(DMA_STATUS), STAT_PTA_REG(DMA_MODE_CTRL),
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};
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#define DEFINE_TALLY(name) \
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u32 name##_sum[ARRAY_SIZE(name##_regs)], \
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name##_counter[ARRAY_SIZE(name##_regs)] \
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#define DEFINE_STAT(name) \
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u32 name##_counter[ARRAY_SIZE(name##_regs)] \
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struct ath_stats {
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DEFINE_TALLY(hw_tx_tally);
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DEFINE_TALLY(hw_rx_tally);
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DEFINE_TALLY(hw_phy_errors);
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DEFINE_STAT(hw_wlan_queue);
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DEFINE_STAT(hw_pta_queue);
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DEFINE_STAT(hw_ampdu_info);
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};
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struct carl9170_debug_mem_rbe {
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u32 reg;
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u32 value;
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};
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#define CARL9170_DEBUG_RING_SIZE 64
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struct carl9170_debug {
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struct ath_stats stats;
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struct carl9170_debug_mem_rbe ring[CARL9170_DEBUG_RING_SIZE];
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struct mutex ring_lock;
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unsigned int ring_head, ring_tail;
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struct delayed_work update_tally;
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};
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struct ar9170;
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void carl9170_debugfs_register(struct ar9170 *ar);
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void carl9170_debugfs_unregister(struct ar9170 *ar);
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#endif /* __DEBUG_H */
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