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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3137497232
This patch adds the opregion driver for Dollar Cove TI PMIC on Intel
Cherry Trail devices. The patch is based on the original work by
Intel, found at:
https://github.com/01org/ProductionKernelQuilts
with many cleanups and rewrites.
The driver is currently provided only as built-in to follow other
PMIC opregion drivers convention.
The re-enumeration of devices at probe is required for fixing the
issues on HP x2 210 G2. See bug#195689.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=193891
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=195689
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
138 lines
3.3 KiB
C
138 lines
3.3 KiB
C
/*
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* Dollar Cove TI PMIC operation region driver
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* Copyright (C) 2014 Intel Corporation. All rights reserved.
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*
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* Rewritten and cleaned up
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* Copyright (C) 2017 Takashi Iwai <tiwai@suse.de>
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/platform_device.h>
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#include "intel_pmic.h"
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/* registers stored in 16bit BE (high:low, total 10bit) */
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#define CHTDC_TI_VBAT 0x54
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#define CHTDC_TI_DIETEMP 0x56
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#define CHTDC_TI_BPTHERM 0x58
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#define CHTDC_TI_GPADC 0x5a
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static struct pmic_table chtdc_ti_power_table[] = {
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{ .address = 0x00, .reg = 0x41 },
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{ .address = 0x04, .reg = 0x42 },
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{ .address = 0x08, .reg = 0x43 },
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{ .address = 0x0c, .reg = 0x45 },
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{ .address = 0x10, .reg = 0x46 },
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{ .address = 0x14, .reg = 0x47 },
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{ .address = 0x18, .reg = 0x48 },
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{ .address = 0x1c, .reg = 0x49 },
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{ .address = 0x20, .reg = 0x4a },
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{ .address = 0x24, .reg = 0x4b },
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{ .address = 0x28, .reg = 0x4c },
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{ .address = 0x2c, .reg = 0x4d },
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{ .address = 0x30, .reg = 0x4e },
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};
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static struct pmic_table chtdc_ti_thermal_table[] = {
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{
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.address = 0x00,
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.reg = CHTDC_TI_GPADC
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},
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{
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.address = 0x0c,
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.reg = CHTDC_TI_GPADC
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},
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/* TMP2 -> SYSTEMP */
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{
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.address = 0x18,
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.reg = CHTDC_TI_GPADC
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},
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/* TMP3 -> BPTHERM */
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{
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.address = 0x24,
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.reg = CHTDC_TI_BPTHERM
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},
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{
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.address = 0x30,
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.reg = CHTDC_TI_GPADC
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},
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/* TMP5 -> DIETEMP */
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{
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.address = 0x3c,
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.reg = CHTDC_TI_DIETEMP
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},
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};
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static int chtdc_ti_pmic_get_power(struct regmap *regmap, int reg, int bit,
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u64 *value)
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{
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int data;
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if (regmap_read(regmap, reg, &data))
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return -EIO;
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*value = data & 1;
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return 0;
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}
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static int chtdc_ti_pmic_update_power(struct regmap *regmap, int reg, int bit,
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bool on)
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{
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return regmap_update_bits(regmap, reg, 1, on);
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}
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static int chtdc_ti_pmic_get_raw_temp(struct regmap *regmap, int reg)
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{
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u8 buf[2];
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if (regmap_bulk_read(regmap, reg, buf, 2))
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return -EIO;
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/* stored in big-endian */
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return ((buf[0] & 0x03) << 8) | buf[1];
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}
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static struct intel_pmic_opregion_data chtdc_ti_pmic_opregion_data = {
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.get_power = chtdc_ti_pmic_get_power,
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.update_power = chtdc_ti_pmic_update_power,
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.get_raw_temp = chtdc_ti_pmic_get_raw_temp,
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.power_table = chtdc_ti_power_table,
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.power_table_count = ARRAY_SIZE(chtdc_ti_power_table),
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.thermal_table = chtdc_ti_thermal_table,
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.thermal_table_count = ARRAY_SIZE(chtdc_ti_thermal_table),
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};
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static int chtdc_ti_pmic_opregion_probe(struct platform_device *pdev)
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{
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struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
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int err;
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err = intel_pmic_install_opregion_handler(&pdev->dev,
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ACPI_HANDLE(pdev->dev.parent), pmic->regmap,
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&chtdc_ti_pmic_opregion_data);
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if (err < 0)
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return err;
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/* Re-enumerate devices depending on PMIC */
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acpi_walk_dep_device_list(ACPI_HANDLE(pdev->dev.parent));
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return 0;
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}
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static const struct platform_device_id chtdc_ti_pmic_opregion_id_table[] = {
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{ .name = "chtdc_ti_region" },
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{},
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};
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static struct platform_driver chtdc_ti_pmic_opregion_driver = {
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.probe = chtdc_ti_pmic_opregion_probe,
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.driver = {
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.name = "cht_dollar_cove_ti_pmic",
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},
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.id_table = chtdc_ti_pmic_opregion_id_table,
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};
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module_platform_driver(chtdc_ti_pmic_opregion_driver);
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MODULE_DESCRIPTION("Dollar Cove TI PMIC opregion driver");
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MODULE_LICENSE("GPL v2");
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