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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5c474a1e22
Isolate the logic of IDTE vs. IPTE flushing of ptes in two functions, ptep_flush_lazy and __tlb_flush_mm_lazy. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
137 lines
3.3 KiB
C
137 lines
3.3 KiB
C
#ifndef _S390_TLBFLUSH_H
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#define _S390_TLBFLUSH_H
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <asm/processor.h>
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#include <asm/pgalloc.h>
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/*
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* Flush all tlb entries on the local cpu.
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*/
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static inline void __tlb_flush_local(void)
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{
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asm volatile("ptlb" : : : "memory");
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}
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#ifdef CONFIG_SMP
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/*
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* Flush all tlb entries on all cpus.
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*/
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void smp_ptlb_all(void);
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static inline void __tlb_flush_global(void)
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{
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register unsigned long reg2 asm("2");
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register unsigned long reg3 asm("3");
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register unsigned long reg4 asm("4");
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long dummy;
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#ifndef CONFIG_64BIT
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if (!MACHINE_HAS_CSP) {
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smp_ptlb_all();
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return;
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}
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#endif /* CONFIG_64BIT */
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dummy = 0;
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reg2 = reg3 = 0;
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reg4 = ((unsigned long) &dummy) + 1;
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asm volatile(
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" csp %0,%2"
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: : "d" (reg2), "d" (reg3), "d" (reg4), "m" (dummy) : "cc" );
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}
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static inline void __tlb_flush_full(struct mm_struct *mm)
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{
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cpumask_t local_cpumask;
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preempt_disable();
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/*
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* If the process only ran on the local cpu, do a local flush.
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*/
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cpumask_copy(&local_cpumask, cpumask_of(smp_processor_id()));
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if (cpumask_equal(mm_cpumask(mm), &local_cpumask))
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__tlb_flush_local();
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else
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__tlb_flush_global();
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preempt_enable();
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}
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#else
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#define __tlb_flush_full(mm) __tlb_flush_local()
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#define __tlb_flush_global() __tlb_flush_local()
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#endif
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/*
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* Flush all tlb entries of a page table on all cpus.
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*/
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static inline void __tlb_flush_idte(unsigned long asce)
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{
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asm volatile(
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" .insn rrf,0xb98e0000,0,%0,%1,0"
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: : "a" (2048), "a" (asce) : "cc" );
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}
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static inline void __tlb_flush_mm(struct mm_struct * mm)
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{
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/*
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* If the machine has IDTE we prefer to do a per mm flush
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* on all cpus instead of doing a local flush if the mm
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* only ran on the local cpu.
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*/
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if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))
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__tlb_flush_idte((unsigned long) mm->pgd |
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mm->context.asce_bits);
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else
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__tlb_flush_full(mm);
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}
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static inline void __tlb_flush_mm_lazy(struct mm_struct * mm)
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{
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if (mm->context.flush_mm) {
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__tlb_flush_mm(mm);
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mm->context.flush_mm = 0;
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}
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}
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/*
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* TLB flushing:
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* flush_tlb() - flushes the current mm struct TLBs
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* flush_tlb_all() - flushes all processes TLBs
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* flush_tlb_mm(mm) - flushes the specified mm context TLB's
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* flush_tlb_page(vma, vmaddr) - flushes one page
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* flush_tlb_range(vma, start, end) - flushes a range of pages
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* flush_tlb_kernel_range(start, end) - flushes a range of kernel pages
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*/
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/*
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* flush_tlb_mm goes together with ptep_set_wrprotect for the
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* copy_page_range operation and flush_tlb_range is related to
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* ptep_get_and_clear for change_protection. ptep_set_wrprotect and
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* ptep_get_and_clear do not flush the TLBs directly if the mm has
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* only one user. At the end of the update the flush_tlb_mm and
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* flush_tlb_range functions need to do the flush.
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*/
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#define flush_tlb() do { } while (0)
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#define flush_tlb_all() do { } while (0)
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#define flush_tlb_page(vma, addr) do { } while (0)
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static inline void flush_tlb_mm(struct mm_struct *mm)
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{
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__tlb_flush_mm_lazy(mm);
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}
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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__tlb_flush_mm_lazy(vma->vm_mm);
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}
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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__tlb_flush_mm(&init_mm);
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}
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#endif /* _S390_TLBFLUSH_H */
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