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e7db0d34b3
Enable the I2C core for this SoC. I add a new type because this version has new features (e.g. DMA) which will be added somewhen later. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
34 lines
840 B
Plaintext
34 lines
840 B
Plaintext
I2C for R-Car platforms
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Required properties:
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- compatible: Must be one of
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"renesas,i2c-rcar"
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"renesas,i2c-r8a7778"
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"renesas,i2c-r8a7779"
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"renesas,i2c-r8a7790"
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"renesas,i2c-r8a7791"
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"renesas,i2c-r8a7792"
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"renesas,i2c-r8a7793"
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"renesas,i2c-r8a7794"
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"renesas,i2c-r8a7795"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: interrupt specifier.
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Optional properties:
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- clock-frequency: desired I2C bus clock frequency in Hz. The absence of this
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propoerty indicates the default frequency 100 kHz.
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- clocks: clock specifier.
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Examples :
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7791";
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reg = <0 0xe6508000 0 0x40>;
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
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clock-frequency = <400000>;
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};
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