mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 00:26:58 +07:00
9e2726776d
This fixes several things while still providing the old API: - simplify and fix locking - better error handling - don't ack all irqs making it impossible to detect a reset of the rtc - use a timeout variant to wait for completion of ADC conversion - provide platform-data to regulator subdevice (This allows making struct mc13783 opaque for other drivers after the regulator driver is updated to use its platform_data.) - expose all interrupts - use threaded irq After all users in mainline are converted to the new API, some things (e.g. mc13783-private.h) can go away. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
155 lines
4.4 KiB
C
155 lines
4.4 KiB
C
/*
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* Copyright 2009 Pengutronix
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* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#ifndef __LINUX_MFD_MC13783_H
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#define __LINUX_MFD_MC13783_H
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#include <linux/interrupt.h>
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struct mc13783;
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void mc13783_lock(struct mc13783 *mc13783);
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void mc13783_unlock(struct mc13783 *mc13783);
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int mc13783_reg_read(struct mc13783 *mc13783, unsigned int offset, u32 *val);
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int mc13783_reg_write(struct mc13783 *mc13783, unsigned int offset, u32 val);
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int mc13783_reg_rmw(struct mc13783 *mc13783, unsigned int offset,
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u32 mask, u32 val);
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int mc13783_irq_request(struct mc13783 *mc13783, int irq,
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irq_handler_t handler, const char *name, void *dev);
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int mc13783_irq_request_nounmask(struct mc13783 *mc13783, int irq,
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irq_handler_t handler, const char *name, void *dev);
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int mc13783_irq_free(struct mc13783 *mc13783, int irq, void *dev);
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int mc13783_ackirq(struct mc13783 *mc13783, int irq);
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int mc13783_mask(struct mc13783 *mc13783, int irq);
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int mc13783_unmask(struct mc13783 *mc13783, int irq);
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#define MC13783_ADC0 43
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#define MC13783_ADC0_ADREFEN (1 << 10)
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#define MC13783_ADC0_ADREFMODE (1 << 11)
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#define MC13783_ADC0_TSMOD0 (1 << 12)
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#define MC13783_ADC0_TSMOD1 (1 << 13)
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#define MC13783_ADC0_TSMOD2 (1 << 14)
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#define MC13783_ADC0_ADINC1 (1 << 16)
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#define MC13783_ADC0_ADINC2 (1 << 17)
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#define MC13783_ADC0_TSMOD_MASK (MC13783_ADC0_TSMOD0 | \
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MC13783_ADC0_TSMOD1 | \
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MC13783_ADC0_TSMOD2)
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/* to be cleaned up */
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struct regulator_init_data;
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struct mc13783_regulator_init_data {
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int id;
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struct regulator_init_data *init_data;
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};
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struct mc13783_regulator_platform_data {
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int num_regulators;
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struct mc13783_regulator_init_data *regulators;
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};
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struct mc13783_platform_data {
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int num_regulators;
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struct mc13783_regulator_init_data *regulators;
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#define MC13783_USE_TOUCHSCREEN (1 << 0)
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#define MC13783_USE_CODEC (1 << 1)
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#define MC13783_USE_ADC (1 << 2)
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#define MC13783_USE_RTC (1 << 3)
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#define MC13783_USE_REGULATOR (1 << 4)
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unsigned int flags;
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};
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#define MC13783_ADC_MODE_TS 1
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#define MC13783_ADC_MODE_SINGLE_CHAN 2
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#define MC13783_ADC_MODE_MULT_CHAN 3
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int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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unsigned int channel, unsigned int *sample);
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#define MC13783_SW_SW1A 0
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#define MC13783_SW_SW1B 1
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#define MC13783_SW_SW2A 2
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#define MC13783_SW_SW2B 3
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#define MC13783_SW_SW3 4
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#define MC13783_SW_PLL 5
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#define MC13783_REGU_VAUDIO 6
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#define MC13783_REGU_VIOHI 7
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#define MC13783_REGU_VIOLO 8
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#define MC13783_REGU_VDIG 9
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#define MC13783_REGU_VGEN 10
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#define MC13783_REGU_VRFDIG 11
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#define MC13783_REGU_VRFREF 12
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#define MC13783_REGU_VRFCP 13
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#define MC13783_REGU_VSIM 14
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#define MC13783_REGU_VESIM 15
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#define MC13783_REGU_VCAM 16
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#define MC13783_REGU_VRFBG 17
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#define MC13783_REGU_VVIB 18
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#define MC13783_REGU_VRF1 19
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#define MC13783_REGU_VRF2 20
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#define MC13783_REGU_VMMC1 21
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#define MC13783_REGU_VMMC2 22
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#define MC13783_REGU_GPO1 23
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#define MC13783_REGU_GPO2 24
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#define MC13783_REGU_GPO3 25
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#define MC13783_REGU_GPO4 26
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#define MC13783_REGU_V1 27
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#define MC13783_REGU_V2 28
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#define MC13783_REGU_V3 29
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#define MC13783_REGU_V4 30
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#define MC13783_IRQ_ADCDONE 0
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#define MC13783_IRQ_ADCBISDONE 1
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#define MC13783_IRQ_TS 2
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#define MC13783_IRQ_WHIGH 3
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#define MC13783_IRQ_WLOW 4
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#define MC13783_IRQ_CHGDET 6
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#define MC13783_IRQ_CHGOV 7
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#define MC13783_IRQ_CHGREV 8
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#define MC13783_IRQ_CHGSHORT 9
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#define MC13783_IRQ_CCCV 10
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#define MC13783_IRQ_CHGCURR 11
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#define MC13783_IRQ_BPON 12
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#define MC13783_IRQ_LOBATL 13
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#define MC13783_IRQ_LOBATH 14
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#define MC13783_IRQ_UDP 15
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#define MC13783_IRQ_USB 16
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#define MC13783_IRQ_ID 19
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#define MC13783_IRQ_SE1 21
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#define MC13783_IRQ_CKDET 22
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#define MC13783_IRQ_UDM 23
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#define MC13783_IRQ_1HZ 24
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#define MC13783_IRQ_TODA 25
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#define MC13783_IRQ_ONOFD1 27
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#define MC13783_IRQ_ONOFD2 28
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#define MC13783_IRQ_ONOFD3 29
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#define MC13783_IRQ_SYSRST 30
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#define MC13783_IRQ_RTCRST 31
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#define MC13783_IRQ_PC 32
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#define MC13783_IRQ_WARM 33
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#define MC13783_IRQ_MEMHLD 34
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#define MC13783_IRQ_PWRRDY 35
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#define MC13783_IRQ_THWARNL 36
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#define MC13783_IRQ_THWARNH 37
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#define MC13783_IRQ_CLK 38
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#define MC13783_IRQ_SEMAF 39
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#define MC13783_IRQ_MC2B 41
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#define MC13783_IRQ_HSDET 42
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#define MC13783_IRQ_HSL 43
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#define MC13783_IRQ_ALSPTH 44
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#define MC13783_IRQ_AHSSHORT 45
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#define MC13783_NUM_IRQ 46
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#endif /* __LINUX_MFD_MC13783_H */
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