mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
f362e5fe0f
This enables you to configure mode (DTE/DCE), Modulo, Window, T1, T2, N2 via sethdlc (which needs to be patched as well). Signed-off-by: Martin Schiller <ms@dev.tdt.de> Signed-off-by: David S. Miller <davem@davemloft.net>
95 lines
2.9 KiB
C
95 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef __HDLC_IOCTL_H__
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#define __HDLC_IOCTL_H__
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#define GENERIC_HDLC_VERSION 4 /* For synchronization with sethdlc utility */
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#define CLOCK_DEFAULT 0 /* Default setting */
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#define CLOCK_EXT 1 /* External TX and RX clock - DTE */
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#define CLOCK_INT 2 /* Internal TX and RX clock - DCE */
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#define CLOCK_TXINT 3 /* Internal TX and external RX clock */
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#define CLOCK_TXFROMRX 4 /* TX clock derived from external RX clock */
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#define ENCODING_DEFAULT 0 /* Default setting */
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#define ENCODING_NRZ 1
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#define ENCODING_NRZI 2
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#define ENCODING_FM_MARK 3
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#define ENCODING_FM_SPACE 4
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#define ENCODING_MANCHESTER 5
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#define PARITY_DEFAULT 0 /* Default setting */
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#define PARITY_NONE 1 /* No parity */
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#define PARITY_CRC16_PR0 2 /* CRC16, initial value 0x0000 */
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#define PARITY_CRC16_PR1 3 /* CRC16, initial value 0xFFFF */
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#define PARITY_CRC16_PR0_CCITT 4 /* CRC16, initial 0x0000, ITU-T version */
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#define PARITY_CRC16_PR1_CCITT 5 /* CRC16, initial 0xFFFF, ITU-T version */
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#define PARITY_CRC32_PR0_CCITT 6 /* CRC32, initial value 0x00000000 */
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#define PARITY_CRC32_PR1_CCITT 7 /* CRC32, initial value 0xFFFFFFFF */
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#define LMI_DEFAULT 0 /* Default setting */
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#define LMI_NONE 1 /* No LMI, all PVCs are static */
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#define LMI_ANSI 2 /* ANSI Annex D */
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#define LMI_CCITT 3 /* ITU-T Annex A */
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#define LMI_CISCO 4 /* The "original" LMI, aka Gang of Four */
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#ifndef __ASSEMBLY__
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typedef struct {
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unsigned int clock_rate; /* bits per second */
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unsigned int clock_type; /* internal, external, TX-internal etc. */
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unsigned short loopback;
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} sync_serial_settings; /* V.35, V.24, X.21 */
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typedef struct {
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unsigned int clock_rate; /* bits per second */
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unsigned int clock_type; /* internal, external, TX-internal etc. */
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unsigned short loopback;
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unsigned int slot_map;
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} te1_settings; /* T1, E1 */
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typedef struct {
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unsigned short encoding;
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unsigned short parity;
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} raw_hdlc_proto;
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typedef struct {
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unsigned int t391;
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unsigned int t392;
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unsigned int n391;
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unsigned int n392;
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unsigned int n393;
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unsigned short lmi;
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unsigned short dce; /* 1 for DCE (network side) operation */
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} fr_proto;
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typedef struct {
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unsigned int dlci;
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} fr_proto_pvc; /* for creating/deleting FR PVCs */
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typedef struct {
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unsigned int dlci;
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char master[IFNAMSIZ]; /* Name of master FRAD device */
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}fr_proto_pvc_info; /* for returning PVC information only */
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typedef struct {
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unsigned int interval;
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unsigned int timeout;
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} cisco_proto;
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typedef struct {
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unsigned short dce; /* 1 for DCE (network side) operation */
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unsigned int modulo; /* modulo (8 = basic / 128 = extended) */
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unsigned int window; /* frame window size */
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unsigned int t1; /* timeout t1 */
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unsigned int t2; /* timeout t2 */
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unsigned int n2; /* frame retry counter */
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} x25_hdlc_proto;
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/* PPP doesn't need any info now - supply length = 0 to ioctl */
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#endif /* __ASSEMBLY__ */
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#endif /* __HDLC_IOCTL_H__ */
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